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參數(shù)資料
| 型號： | MC33368D |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 50mA Switched-Cap DC/DC Converter 8-MSOP |
| 中文描述： | 0.01 A POWER FACTOR CONTROLLER, PDSO14 |
| 封裝： | PLASTIC, SO-16/14 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 476K |
| 代理商： | MC33368D |
MC33368
http://onsemi.com
10
Table 1. Design Equations
Calculation
Formula
Notes
Converter Output Power
PO
VOIO
Calculate the maximum required output power.
Peak Indicator Current
IL(pk)
2 2 PO
Vac(LL)
Calculated at the minimum required ac line voltage for
output regulation. Let the efficiency
η
= 0.92 for low line
operation.
Inductance
LP
t
VO
2
–Vac(LL)
Vac(LL)2
2 VOPO
Let the switching cycle t = 40
μ
s for universal input (85
to 265 Vac) operation and 20
μ
s for fixed input (92 to
138 Vac, or 184 to 276 Vac) operation.
Switch On–Time
t(on)
2 POLP
Vac2
In theory, the on–time t(on) is constant. In practice, t(on)
tends to increase at the ac line zero crossings due to
the charge on capacitor C5. Let Vac = Vac(LL) for initial
t(on) and t(off) calculations.
The off–time t(off) is greatest at the peak of the ac line
voltage and approaches zero at the ac line zero
crossings. Theta (
θ
) represents the angle of the ac line
voltage.
Switch Off–Time
t(off)
t(on)
VO
2 Vac Sin
–1
Minimum Switch
Off–Time
t(off)min
LPIL(pk)
VO
The off–time is at a minimum at ac line crossings. This
equation is used to calculate t(off) as Theta approaches
zero.
Delay Time
td
– R10 C7 ln
VCC– 2
VCC
The delay time is used to override the minimum
off–time at the ac line zero crossings by programming
the Frequency Clamp with C7 and R10.
Switching Frequency
f
1
t(on)
t(off)
The minimum switching frequency occurs at the peak of
the ac line voltage. As the ac line voltage traverses
from peak to zero, t(off) approaches zero producing an
increase in switching frequency.
Peak Switch Current
R7
VCS
IL(pk)
Set the current sense threshold VCS to 1.0 V for
universal input (85 to 265 Vac) operation and to 0.5 V
for fixed input (92 to 138 Vac, or 184 to 276 Vac)
operation. Note that VCS must be less than 1.4 V.
Set the multiplier input voltage VM to 3.0 V at high line.
Empirically adjust VM for the lowest distortion over the
ac line voltage range while guaranteeing startup at
minimum line.
Multiplier Input Voltage
VM
Vac
R5
R3
2
1
Converter Output
Voltage
VO
Vref
R2
R1
1
– IIBR1
The IIB R1 error term can be minimized with a divider
current in excess of 100
μ
A.
Converter Output
Peak–to–Peak
Ripple Voltage
VO(pp)
IL(pk)
1
facC3
2
2
ESR2
The calculated peak–to–peak ripple must be less than
16% of the average dc output voltage to prevent false
tripping of the Overvoltage Comparator. Refer to the
Overvoltage Comparator Text. ESR is the equivalent
series resistance of C3.
Error Amplifier
Bandwidth
BW
gm
2
C1
The bandwidth is typically set to 20 Hz. When operating
at high ac line, the value of C1 may need to be
increased.
NOTE
: The following converter characteristics must be chosen:
VO = Desired output voltage.
IO = Desired output current.
Vac = AC RMS operating line voltage.
Vac(LL) = AC RMS minimum required operating line voltage for output regulation.
VO = Converter output peak–to–peak ripple voltage.
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| MC33368P | 功能描述:功率因數(shù)校正 IC High Voltage PFC RoHS:否 制造商:Fairchild Semiconductor 開關(guān)頻率:300 KHz 最大功率耗散: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Reel |
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