MC33365
9
MOTOROLA ANALOG IC DEVICE DATA
The Power Switch is designed to directly drive the converter
transformer and is capable of switching a maximum of 700 V
and 1.0 A. Proper device voltage snubbing and heatsinking
are required for reliable operation.
A Leading Edge Blanking circuit was placed in the current
sensing signal path. This circuit prevents a premature reset
of the PWM Latch. The premature reset is generated each
time the Power Switch is driven into conduction. It appears as
a narrow voltage spike across the current sense resistor, and
is due to the MOSFET gate to source capacitance,
transformer interwinding capacitance, and output rectifier
recovery time. The Leading Edge Blanking circuit has a
dynamic behavior in that it masks the current signal until the
Power Switch turn–on transition is completed. The current
limit propagation delay time is typically 262 ns. This time is
measured from when an overcurrent appears at the Power
Switch drain, to the beginning of turn–off.
Error Amplifier
An fully compensated Error Amplifier with access to the
inverting input and output is provided for primary side voltage
sensing, Figure 16. It features a typical dc voltage gain of 82
dB, and a unity gain bandwidth of 1.0 MHz with 78 degrees of
phase margin, Figure 5. The noninverting input is internally
biased at 2.6 V
±
3.1% and is not pinned out. The Error
Amplifier output is pinned out for external loop compensation
and as a means for directly driving the PWM Comparator.
The output was designed with a limited sink current capability
of 270
μ
A, allowing it to be easily overridden with a pull–up
resistor. This is desirable in applications that require
secondary side voltage sensing.
Bulk Capacitor Voltage Comparator
The Bulk Capacitor Voltage Comparator is included to
sense the brown–out condition of the bulk capacitor line
voltage. The non–inverting input, Pin 11, is connected to the
voltage divider to sense the line voltage. The inverting input is
connected internally to a threshold voltage of 1.25V. As the
line voltage drops below 120V (Pin 11 drops below 1.25V),
the reset signal is activiated from the PWM Latch to turn off
the Power Switch. To prevent erratic switching as the
threshold is crossed, hysteresis at Pin 11 is provided.
Undervoltage Lockout
An Undervoltage Lockout comparator has been
incorporated to guarantee that the integrated circuit has
sufficient voltage to be fully functional before the output stage
is enabled. The UVLO comparator monitors the VCC voltage
at Pin 3 and when it exceeds 14.5 V, the reset signal is
removed from the PWM Latch allowing operation of the
Power Switch. To prevent erratic switching as the threshold is
crossed, 5.0 V of hysteresis is provided.
Startup Control
An internal Startup Control circuit with a high voltage
enhancement mode MOSFET is included within the
MC33365. This circuitry allows for increased converter
efficiency by eliminating the external startup resistor, and its
associated power dissipation, commonly used in most
off–line converters that utilize a UC3842 type of controller.
Rectified ac line voltage is applied to the Startup Input, Pin 1.
This causes the MOSFET to enhance and supply internal
bias as well as charge current to the VCC bypass capacitor
that connects from Pin 3 to ground. When VCC reaches the
UVLO upper threshold of 15.2 V, the IC commences
operation and the startup MOSFET is turned off. Operating
bias is now derived from the auxiliary transformer winding,
and all of the device power is efficiently converted down from
the rectified ac line.
The startup MOSFET will provide a steady current of
1.7 mA, Figure 10, as VCC increases or shorted to ground.
The startup MOSFET is rated at a maximum of 400 V with
VCC shorted to ground, and 500 V when charging a VCC
capacitor of 1000
μ
F or less.
Regulator
A low current 6.5 V regulated output is available for
biasing the Error Amplifier and any additional control system
circuitry. It is capable of up to 10 mA and has short–circuit
protection. This output requires an external bypass capacitor
of at least 1.0
μ
F for stability.
Thermal Shutdown and Package
Internal thermal circuitry is provided to protect the Power
Switch in the event that the maximum junction temperature is
exceeded. When activated, typically at 150
°
C, the Latch is
forced into a ‘reset’ state, disabling the Power Switch. The
Latch is allowed to ‘set’ when the Power Switch temperature
falls below 140
°
C. This feature is provided to prevent
catastrophic failures from accidental device overheating. It is
not intended to be used as a substitute for proper
heatsinking.
The MC33365 is contained in a heatsinkable plastic
dual–in–line package in which the die is mounted on a
special heat tab copper alloy lead frame. This tab consists of
the four center ground pins that are specifically designed to
improve thermal conduction from the die to the circuit board.
Figure 15 shows a simple and effective method of utilizing the
printed circuit board medium as a heat dissipater by
soldering these pins to an adequate area of copper foil. This
permits the use of standard layout and mounting practices
while having the ability to halve the junction to air thermal
resistance. The examples are for a symmetrical layout on a
single–sided board with two ounce per square foot of copper.