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| 型號： | MC33157DW |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | MOSFETs |
| 英文描述： | Tag-it(TM) HF-I Standard Transponder Inlays Square 0-RFIDN -25 to 70 |
| 中文描述： | HALF BRDG BASED MOSFET DRIVER, PDSO16 |
| 封裝： | PLASTIC, SO-16 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 269K |
| 代理商： | MC33157DW |
MC33157
http://onsemi.com
4
PIN FUNCTION DESCRIPTION
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reference
Preheat timing
It is charged with a constant current and cares must be observed to minimize the leakage current
at this pin to get the expected timing. Typically, a 0.47
μ
F capacitor will give a 2 seconds
pre–heating time and a 125 ms strike sequence recycle time. (See details given by figure 9)
Supply voltage
input
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up to 25 mA and shall be decoupled to ground by a 220nF ceramic capacitor
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Preheat and
Strike
frequencies
resistors
fluorescent tube. (See details given by figure 9)
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This pin provides the DC supply to the circuit. The voltage is internally clamped by a zener
connected to the ground. It is NOT allowed to use a DC low impedance power supply to feed this
pin, but limiting the current by an external resistor is mandatory. It is recommended to damp this pin
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This pin provides a +7V voltage reference derived from the internal bandgap. The +Vref can supply
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adjustment
current input
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input
When a negative going slope (across the internal reference) is detected, the system considers the
lamp has struck and the oscillator jumps from the present frequency value, which is within the
window defined by RPH and RENDSWEEP to the steady state value defined by ROP. If no negative
going slope is detected on this pin, the system will repeat the sweep and strike sequence four
times, then stops. The circuit will re–start from either a RESET, or by pulling +VDD to ground. The
input signal can be either a logic level or an analog voltage ramping up from zero to +Vref followed
by a negative going slope to zero. In any case, the positive pulse width must be 1
μ
s minimum. The
pcb layout must be designed to minimize the noise at this pin. (See details given by figures 8, 9, &
10)
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This capacitor sets two timings: filaments preheat time (tPH) and strike sequence recycle time (tSK).
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to an exponential and the frequency shifts with the same law.
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The RPH resistor together with RENDSWEEP and COP defines the frequency used to preheat the
timing, the frequency will sweep from the high pre–heating f1 to the low strike f2 values. Normally,
f1 is far from the LC resonance but f2 is close enough to generate the high voltage across the
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(polycarbonate).
sweep timing
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constant current, cares must be observed to minimize the leakage current at this pin to get the
expected timing. Since this capacitor is charged through resistor RPH, the voltage rises according
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implement a dimming function.
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capacitor
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capacitor is charged with a low constant current, cares must be observed to minimize the leakage
current at this pin to get the expected frequency. Film type capacitor are recommended
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ICO
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input
and lamp strike sequence. The master reset does not include the pre–heating timing. The minimum
pulse width requested is 10
μ
s to guarantee a reset state. However, this pin has no built in filtering
and a shorter pulse may initialize a reset sequence: it is the responsibility of the designer to make
sure that no noise or parasitic pulse are developed at the RESET input. A full re–start of the
sequence, including the pre–heating time, can be initialized by pulling the +VDD pin to ground. In this
case, +VDD and RESET must be simultaneously released to a high state. When RESET is asserted
low (active) both outputs MOS are biased in the off condition. An internal 20
μ
A pull up current forces
the pin to logic one, allowing the designer to left this pin open if the RESET function is not used. In
order to avoid any uncontrolled state of the output drivers, it is recommended to set up a 10ms low
level at pin 10. The reset is activated in less than 10 microsecond, but releasing this pin while the Vcc
supply is high (above 300V) can generate a random operation, depending upon the dv/dt coming
from the power supply.
Steady state
operating
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Since the circuit uses a Current Controlled Oscillator (ICO), the current forced into this pin will
control the operating frequency. The allowable current range is from 1
μ
A to 500
μ
A. The +Vref
output can be used to provide the voltage across ROP. An auxiliary voltage source can be used to
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DTA
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Dead Time
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This pin provides an access to the internal timing system to adjust the dead time between the gate
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