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參數(shù)資料
| 型號： | MC33077 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Low Noise Dual Operational Amplifier(低噪聲四運(yùn)放) |
| 中文描述： | 低噪聲雙運(yùn)算放大器（低噪聲四運(yùn)放） |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 175K |
| 代理商： | MC33077 |
MC33077
http://onsemi.com
11
APPLICATIONS INFORMATION
The MC33077 is designed primarily for its low noise, low
offset voltage, high gain bandwidth product and large output
swing characteristics. Its outstanding high frequency
gain/phase performance make it a very attractive amplifier for
high quality preamps, instrumentation amps, active filters and
other applications requiring precision quality characteristics.
The MC33077 utilizes high frequency lateral PNP input
transistors in a low noise bipolar differential stage driving a
compensated Miller integration amplifier. Dualdoublet
frequency compensation techniques are used to enhance the
gain bandwidth product. The output stage uses an all NPN
transistor design which provides greater output voltage
swing and improved frequency performance over more
conventional stages by using both PNP and NPN transistors
(Class AB). This combination produces an amplifier with
superior characteristics.
Through precision component matching and innovative
current mirror design, a lower than normal temperature
coefficient of input offset voltage (2.0 V/
°
C as opposed to
10 V/
°
C), as well as low input offset voltage, is accomplished.
The minimum common mode input range is from 1.5 V
below the positive rail (V
CC
) to 1.5 V above the negative rail
(V
EE
). The inputs will typically common mode to within
1.0 V of both negative and positive rails though degradation
in offset voltage and gain will be experienced as the common
mode voltage nears either supply rail. In practice, though not
recommended, the input voltage may exceed V
CC
by
approximately 3.0 V and decrease below the V
EE
by
approximately 0.6 V without causing permanent damage to
the device. If the input voltage on either or both inputs is less
than approximately 0.6 V, excessive current may flow, if not
limited, causing permanent damage to the device.
The amplifier will not latch with input source currents up
to 20 mA, though in practice, source currents should be
limited to 5.0 mA to avoid any parametric damage to the
device. If both inputs exceed V
CC
, the output will be in the
high state and phase reversal may occur. No phase reversal
will occur if the voltage on one input is within the common
mode range and the voltage on the other input exceeds V
CC
.
Phase reversal may occur if the input voltage on either or
both inputs is less than 1.0 V above the negative rail. Phase
reversal will be experienced if the voltage on either or both
inputs is less than V
EE
.
Through the use of dualdoublet frequency compensation
techniques, the gain bandwidth product has been greatly
enhanced over other amplifiers using the conventional
single pole compensation. The phase and gain error of the
amplifier remains low to higher frequencies for fixed
amplifier gain configurations.
With the all NPN output stage, there is minimal swing loss
to the supply rails, producing superior output swing, no
crossover distortion and improved output phase symmetry
with output voltage excursions (output phase symmetry
being the amplifiers ability to maintain a constant phase
relation independent of its output voltage swing). Output
phase symmetry degradation in the more conventional PNP
and NPN transistor output stage was primarily due to the
inherent cutoff frequency mismatch of the PNP and NPN
transistors used (typically 10 MHz and 300 MHz,
respectively), causing considerable phase change to occur as
the output voltage changes. By eliminating the PNP in the
output, such phase change has been avoided and a very
significant improvement in output phase symmetry as well
as output swing has been accomplished.
The output swing improvement is most noticeable when
operation is with lower supply voltages (typically 30% with
±
5.0 V supplies). With a 10 k load, the output of the
amplifier can typically swing to within 1.0 V of the positive
rail (V
CC
), and to within 0.3 V of the negative rail (V
EE
),
producing a 28.7 V
pp
signal from
±
15 V supplies. Output
voltage swing can be further improved by using an output
pullup resistor referenced to the V
CC
. Where output signals
are referenced to the positive supply rail, the pullup resistor
will pull the output to V
CC
during the positive swing, and
during the negative swing, the NPN output transistor
collector will pull the output very near V
EE
. This
configuration will produce the maximum attainable output
signal from given supply voltages. The value of load
resistance used should be much less than any feedback
resistance to avoid excess loading and allow easy pullup of
the output.
Output impedance of the amplifier is typically less than
50
at frequencies less than the unity gain crossover
frequency (see Figure 19). The amplifier is unity gain stable
with output capacitance loads up to 500 pF at full output
swing over the 55
°
to +125
°
C temperature range. Output
phase symmetry is excellent with typically 4
°
C total phase
change over a 20 V output excursion at 25
°
C with a 2.0 k
and 100 pF load. With a 2.0 k
capacitance loading, the total phase change is approximately
one degree for the same 20 V output excursion. With a
2.0 k
and 500 pF load at 125
°
C, the total phase change is
typically only 10
°
C for a 20 V output excursion (see
Figure 28).
As with all amplifiers, care should be exercised to insure
that one does not create a pole at the input of the amplifier
which is near the closed loop corner frequency. This becomes
a greater concern when using high frequency amplifiers since
it is very easy to create such a pole with relatively small values
of resistance on the inputs. If this does occur, the amplifier’s
phase will degrade severely causing the amplifier to become
unstable. Effective source resistances, acting in conjunction
with the input capacitance of the amplifier, should be kept to
a minimum to avoid creating such a pole at the input (see
Figure 32). There is minimal effect on stability where the
created input pole is much greater than the closed loop corner
frequency. Where amplifier stability is affected as a result of
a negative feedback resistor in conjunction with the
resistive load and no
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| MC33078DG | Low Noise Dual/Quad Operational Amplifiers |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC33077_04 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Low Noise Dual Operational Amplifier |
| MC33077D | 功能描述:運(yùn)算放大器 - 運(yùn)放 Dual 11V/us Low RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| MC33077DG | 功能描述:運(yùn)算放大器 - 運(yùn)放 Dual 11V/us Low Noise Ind. Temp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| MC33077DR2 | 功能描述:運(yùn)算放大器 - 運(yùn)放 Dual 11V/us Low RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| MC33077DR2G | 功能描述:運(yùn)算放大器 - 運(yùn)放 Dual 11V/us Low Noise Ind. Temp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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