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MC145583
MOTOROLA
5
PIN DESCRIPTIONS
VCC
Digital Power Supply (Pin 27)
This digital supply pin is connected to the logic power sup-
ply. This pin should have a not less than 0.33
μ
F capacitor
GND.
GND
Ground (Pin 2)
Ground return pin is typically connected to the signal
ground pin of the EIA–232–E connector (Pin 7) as well as to
the logic power supply ground.
VDD
Positive Power Supply (Pin 23)
This is the positive output of the on–chip voltage tripler and
the positive power supply input of the driver/receiver sections
of the device. This pin requires an external storage capacitor
to filter the 50% duty cycle voltage generated by the charge
pump.
VSS
Negative Power Supply (Pin 5)
This is the negative output of the on–chip voltage tripler/in-
verter and the negative power supply input of the driver/ re-
ceiver sections of the device. This pin requires an external
storage capacitor to filter the 50% duty cycle voltage gener-
ated by the charge pump.
RIMON
Ring Monitor Circuit (Pin 4)
The Ring Monitor Circuit will convert the input level on Rx1
pin at standby mode and output on the RIMON pin.
STB
Standby Mode (Pin 6)
The device enters the standby mode while this pin is con-
nected to the logic high level. During the standby mode,
driver and receiver output pins become high–impedance
state. In this condition, supply current ICC is below 5
μ
A (typ).
C5+, C5–, C2+, C2–, C1+, C1–
Voltage Tripler and Inverter (Pins 1, 3, 28, 26, 25, 24)
These are the connections to the internal voltage tripler
and inverter, which generate the VDD and VSS voltages.
Rx1, Rx2, Rx3, Rx4, Rx5
Receive Data Inputs (Pins 7, 8, 9, 11, 13)
These are the EIA–232–E receive signal inputs. A voltage
between + 3 and + 25 V is decoded as a space, and causes
the corresponding DO pin to swing to GND (0 V). A voltage
between – 3 and – 25 V is decoded as a mark, and causes
the DO pin to swing up to VCC.
DO1, DO2, DO3, DO4, DO5
Data Outputs (Pins 22, 21, 20, 18, 16)
These are the receiver digital output pins, which swing
from VCC to GND. Output level of these pins is high imped-
ance while in standby mode.
DI1, DI2, DI3
Data Inputs (Pins 19, 17, 15)
These are the high impedance digital input pins to the
drivers. Input voltage levels on these pins must be between
VCC and GND.
Tx1, Tx2, Tx3
Transmit Data Output (Pins 10, 12, 14)
These are the EIA–232–E transmit signal output pins,
which swing toward VDD and VSS. A logic 1 at a DI input
causes the corresponding Tx output to swing toward VSS.
The actual levels and slew rate achieved will depend on the
output loading (RL/CL).
The minimum output impedance is 300
when turned off.
SWITCHING CHARACTERISTICS
50%
DI1 – DI3
(INPUT)
+ 3 V
0 V
tf
10%
90%
tr
tDPHL
tDPLH
VOL
VOH
Tx1 – Tx3
(OUTPUT
)
50%
Rx1 – Rx5
(INPUT)
+ 3 V
0 V
tf
10%
90%
tr
tRPHL
tRPLH
VOL
VOH
DO1 – DO5
(OUTPUT)
STB (INPUT)
Tx1 – Tx3
(OUTPUT)
+ 3.3 V
0 V
VOL
VOH
+ 1.5 V
+ 1.5 V
+ 5 V
+ 5 V
– 5 V
– 5 V
tDAZ
tDZA
HIGH Z
STB (INPUT)
DO1 – DO5
(OUTPUT)
+ 3.3 V
0 V
VOL
VOH
+ 1.5 V
+ 1.5 V
90%
90%
10%
10%
tRAZ
tRZA
HIGH Z
RECEIVER
DRIVER
RECEIVER
DRIVER