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參數(shù)資料
| 型號： | MC10EP52DTR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop |
| 中文描述： | 10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8 |
| 封裝： | PLASTIC, TSSOP-8 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 83K |
| 代理商： | MC10EP52DTR2 |
Semiconductor Components Industries, LLC, 2004
June, 2004 Rev. 3
1
Publication Order Number:
MC10EP52/D
MC10EP52, MC100EP52
3.3V / 5VECL Differential
Data and Clock D FlipFlop
The MC10EP/100EP52 is a differential data, differential clock D
flipflop. The device is pin and functionally equivalent to the EL52
device.
Data enters the master portion of the flipflop when the clock is
LOW and is transferred to the slave, and thus the outputs, upon a
positive transition of the clock. The differential clock inputs of the
EP52 allow the device to also be used as a negative edge triggered
device.
The EP52 employs input clamping circuitry so that under open input
conditions (pulled down to V
EE
) the outputs of the device will remain
stable.
The 100 Series contains temperature compensation.
330 ps Typical Propagation Delay
Maximum Frequency
4 GHz Typical
PECL Mode: V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
NECL Mode: V
CC
= 0 V with V
EE
= 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at V
EE
ALYW
SO8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
HEP52
L = Wafer Lot
Y = Year
W = Work Week
H = MC10
K = MC100
A = Assembly Location
ALYW
KEP52
ALYW
HP52
TSSOP8
DT SUFFIX
CASE 948R
ALYW
KP52
1
8
1
8
1
8
1
8
1
8
1
8
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10EP52DR2 | 3.3V / 5V ECL Differential Receiver/Driver with Internal Termination Data and Clock D Flip-Flop |
| MC10EP52 | 3.3V / 5V ECL Differential Data and Clock D Flip Flop(3.3V / 5V ECL 差分數(shù)據(jù)和時鐘的D觸發(fā)器) |
| MC10EP56DT | Dual Differential 2:1 Multiplexer |
| MC10EP56DTR2 | Dual Differential 2:1 Multiplexer |
| MC10EP56 | 3.3V/5VECL Dual Differential 2:1 Multiplexer(3.3V/5V，ECL雙差分2:1多路復用器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10EP52DTR2G | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type Diff Data and Clock RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC10EP52MNR4G | 功能描述:觸發(fā)器 BBG ECL FL/FLOP DIFF RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC10EP56DT | 功能描述:編碼器、解碼器、復用器和解復用器 3.3V/5V ECL Dual RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC10EP56DTG | 功能描述:編碼器、解碼器、復用器和解復用器 3.3V/5V ECL Dual Diff 2:1 Mux RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| MC10EP56DTR2 | 功能描述:編碼器、解碼器、復用器和解復用器 3.3V/5V ECL Dual RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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