Table 10. 100EP DC CHARACTERISTICS, NECL VCC
參數(shù)資料
型號: MC100EP52DTG
廠商: ON Semiconductor
文件頁數(shù): 9/12頁
文件大?。?/td> 0K
描述: IC FLIP FLOP ECL DATA/CLK 8TSSOP
標準包裝: 100
系列: 100EP
功能: 標準
類型: D 型
輸出類型: 差分
元件數(shù): 1
每個元件的位元數(shù): 1
頻率 - 時鐘: 3GHz
延遲時間 - 傳輸: 330ps
觸發(fā)器類型: 正邊沿
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
包裝: 管件
其它名稱: MC100EP52DTGOS
MC10EP52, MC100EP52
http://onsemi.com
6
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = 5.5 V to 3.0 V (Note 18)
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
20
34
44
20
35
45
20
37
47
mA
VOH
Output HIGH Voltage (Note 19)
1145 1020
895
1145 1020
895
1145 1020
895
mV
VOL
Output LOW Voltage (Note 19)
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
VIH
Input HIGH Voltage (SingleEnded)
1225
880
1225
880
1225
880
mV
VIL
Input LOW Voltage (SingleEnded)
1945
1625 1945
1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 20)
VEE+2.0
0.0
VEE+2.0
0.0
VEE+2.0
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18.Input and output parameters vary 1:1 with VCC.
19.All loading with 50 W to VCC 2.0 V.
20.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = 3.0 V to 5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21)
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
VOUTpp
Output Voltage Amplitude @ 3.0 GHz
(Figure 2)
630
750
610
730
520
640
GHz
tPLH,
tPHL
Propagation Delay to
Output Differential
CLK, CLK>Q, Q
250
300
350
280
330
380
310
360
410
ps
tS
tH
Setup Time
Hold Time
50
0
50
0
50
0
ps
tJITTER
CLOCK Random Jitter (RMS)
(Figure 2)
0.2
1
0.2
1
0.2
1
ps
VPP
Input Voltage Swing
(Differential Configuration)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
(20% 80%)
Q, Q
70
110
170
80
120
180
90
130
200
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
21.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
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