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參數(shù)資料
| 型號： | MC100EP446FAR2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 2/20頁 |
| 文件大小： | 0K |
| 描述： | IC CONV 8BIT SER/PAR ECL 32LQFP |
| 產(chǎn)品變化通告： | LTB Notification 03/Jan/2008 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 應(yīng)用： | 數(shù)據(jù)管理 |
| 接口： | 差分 |
| 電源電壓： | 3 V ~ 5.5 V |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-LQFP（7x7） |
| 包裝： | 剪切帶 (CT) |
| 安裝類型： | 表面貼裝 |
| 其它名稱： | MC100EP446FAROSCT |
MC10EP446, MC100EP446
http://onsemi.com
10
Table 13. AC CHARACTERISTICS VCC = 0 V; VEE = 3.0 V to 5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Frequency
(Figure 15)
CKSEL High
CKSEL Low
3.2
1.6
3.4
1.7
3.2
1.6
3.4
1.7
3.2
1.6
3.4
1.7
GHz
tPLH,
tPHL
Propagation Delay to Output Differential
CKSEL = 0
CLK TO SOUT,
CLK TO PCLK
650
700
750
800
850
900
700
750
800
850
900
950
725
775
850
900
975
1025
ps
CKSEL = 1
CLK TO SOUT,
CLK TO PCLK
775
850
875
950
975
1050
825
900
925
1000
1025
1100
875
950
1000
1075
1125
1200
ps
tS
Setup Time
D to CLK+
(Figure 4)
SYNC to CLK
(Figure 5)
CKEN+ to CLK
(Figure 6)
375
200
70
425
140
40
400
200
70
450
140
40
450
200
70
500
140
40
ps
th
Hold Time
D to CLK+
(Figure 4)
SYNC to CLK
CLK to CKEN
(Figure 6)
525
0
75
575
45
550
0
75
600
45
600
0
75
650
45
ps
tpw
Minimum Pulse Width (Note 22)
Data (D0D7)
SYNC
CKEN
150
200
145
150
200
145
150
200
145
ps
tJITTER
Random Clock Jitter (RMS)
v fmax Typ
0.2
< 1
0.2
< 1
0.2
< 1
ps
VPP
Input Differential Voltage Swing
(Note 21)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
SOUT
(20% 80%)
50
100
150
70
120
170
90
140
190
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
21.VPP(min) is the minimum input swing for which AC parameters are guaranteed.
22.The minimum pulse width is valid only if the setup and hold times are respected.
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| MC100EP446FAR2G | 功能描述:串行到并行邏輯轉(zhuǎn)換器 3.3V/5V ECL 8-Bit Serial to Parallel RoHS:否 制造商:Supertex 工作電源電壓: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP446MNG | 功能描述:串行到并行邏輯轉(zhuǎn)換器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作電源電壓: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP446MNR4G | 功能描述:串行到并行邏輯轉(zhuǎn)換器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作電源電壓: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP451 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5VECL 6-Bit Differential Register with Master Reset |
| MC100EP451FA | 功能描述:觸發(fā)器 3.3V/5V ECL 6-Bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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