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參數(shù)資料
| 型號： | MBM29F800TA-70PFTN-E1 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 512K X 16 FLASH 5V PROM, 70 ns, PDSO48 |
| 封裝： | PLASTIC, TSOP1-48 |
| 文件頁數(shù)： | 49/49頁 |
| 文件大?。?/td> | 693K |
| 代理商： | MBM29F800TA-70PFTN-E1 |
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MBM29F800TA-55/-70/-90/MBM29F800BA-55/-70/-90
8
Notes :
Address bits A11 to A18 = X = “H” or “L” for all address commands except or Program Address (PA) and
Sector Address (SA).
Bus operations are defined in “MBM29F800TA/BA User Bus Operation (BYTE = VIH)” and
“MBM29F800TA/BA User Bus Operation (BYTE
= VIH)” in sDEVICE BUS OPERATION.
RA = Address of the memory location to be read.
IA
= Autoselect read address.
PA
= Address of the memory location to be programmed. Addresses are latched on the falling edge of
the WE pulse.
SA
= Address of the sector to be erased. The combination of A18, A17, A16, A15, A14, A13, and A12 will
uniquely select any sector.
RD = Data read from location RA during read operation.
ID
= Device code/manufacture code for the address located by IA.
PD
= Data to be programmed at location PA. Data is latched on the rising edge of WE.
The system should generate the following address patterns:
Word Mode: 555h or 2AAh to addresses A10 to A0
Byte Mode: AAAh or 555h to addresses A10 to A-1
Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Command combinations not described in Command Definitions table are illegal.
*1 : Both of these reset commands are equivalent.
*2 : The fourth bus cycle is only for read.
MBM29F800TA/BA Command Definitions
Command
Sequence
Bus
Write
Cycles
Req'd
First Bus
Write Cycle
Second
Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Read/
Reset*1
Word
1
XXXh
F0h
—
————————
Byte
Read/
Reset*1
Word
3
555h
AAh
2AAh
55h
555h
F0h
RA*2
RD*2
————
Byte
AAAh
555h
AAAh
Autoselect
Word
3
555h
AAh
2AAh
55h
555h
90h
IA*2
ID*2
————
Byte
AAAh
555h
AAAh
Byte/Word
Program
Word
4
555h
AAh
2AAh
55h
555h
A0h
PA
PD
—
———
Byte
AAAh
555h
AAAh
Chip Erase
Word
6
555h
AAh
2AAh
55h
555h
80h
555h
AAh
2AAh
55h
555h
10h
Byte
AAAh
555h
AAAh
555h
AAAh
Sector Erase
Word
6
555h
AAh
2AAh
55h
555h
80h
555h
AAh
2AAh
55h
SA
30h
Byte
AAAh
555h
AAAh
555h
Sector Erase Suspend
Erase can be suspended during sector erase with Addr (“H” or “L”). Data (B0h)
Sector Erase Resume
Erase can be resumed after suspend with Addr (“H” or “L”). Data (30h)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29F800TA-70PFTN-SFL(E1) | 制造商:Fujitsu 功能描述: |
| MBM29F800TA-70PFTN-SFLE1 | 制造商:Spansion 功能描述:IC 5V 8M FLASH |
| MBM29F800TA-70PFTR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29F800TA-90 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29F800TA-90PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
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