參數(shù)資料
型號: MBM29DL162TE-70TR
廠商: FUJITSU LTD
元件分類: PROM
英文描述: 1M X 16 FLASH 3V PROM, 70 ns, PDSO48
封裝: PLASTIC, REVERSE, TSOP1-48
文件頁數(shù): 29/76頁
文件大小: 1145K
代理商: MBM29DL162TE-70TR
MBM29DL16XTE/BE70/90
35
To resume the operation of Sector Erase, the Resume command (30h) should be written to the bank being erase
suspended. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend
command can be written after the chip has resumed erasing.
Extended Command
(1) Fast Mode
MBM29DL16XTE/BE have Fast Mode function. This mode dispenses with the initial two unclock cycles
required in the standard program command sequence by writing Fast Mode command into the command
register. In this mode, the required bus cycle for programming is two cycles instead of four bus cycles in
standard program command. (Do not write erase command in this mode.) The read operation is also executed
after exiting this mode. To exit this mode, it is necessary to write Fast Mode Reset command into the command
register. The first cycle must contain the bank address. (Refer to “(7) Embedded ProgramTM Algorithm for
Fast Mode” in sFLOW CHART.) The VCC active current is required even CE = VIH during Fast Mode.
(2) Fast Programming
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). (Refer to
“(7) Embedded ProgramTM Algorithm for Fast Mode” in sFLOW CHART.)
(3) Extended Sector Group Protection
In addition to normal sector group protection, the MBM29DL16XTE/BE have Extended Sector Group
Protection as extended function. This function enables to protect sector group by forcing VID on RESET pin
and write a command sequence. Unlike conventional procedure, it is not necessary to force VID and control
timing for control pins. The extended sector group protection requires VID on RESET pin only. With this
condition, the operation is initiated by writing the set-up command (60h) into the command register. Then,
the sector group addresses pins (A20, A19, A18, A17, A16, A15, A14, A13 and A12) and (A6, A1, A0) = (0, 1, 0) should
be set to the sector group to be protected (recommend to set VIL for the other addresses pins), and write
extended sector group protection command (60h). A sector group is typically protected in 250
s. To verify
programming of the protection circuitry, the sector group addresses pins (A20, A19, A18, A17, A16, A15, A14, A13
and A12) and (A6, A1, A0) = (0, 1, 0) should be set and write a command (40h). Following the command write,
a logical “1” at device output DQ0 will produce for protected sector in the read operation. If the output data
is logical “0”, please repeat to write extended sector group protection command (60h) again. To terminate
the operation, it is necessary to set RESET pin to VIH. (Refer to “(17) Extended Sector Group Protection
Timing Diagram” in sTIMING DIAGRAM and “(8) Extended Sector Group Protection Algorithm” in sFLOW
CHART.)
(4) CFI (Common Flash Memory Interface)
The CFI (Common Flash Memory Interface) specification outlines device and host system software
interrogation handshake which allows specific vendor-specified software algorithms to be used for entire
families of devices. This allows device-independent, JEDEC ID-independent, and forward-and backward-
compatible software support for the specified flash device families. Refer to CFI specification in detail.
The operation is initiated by writing the query command (98h) into the command register. The bank address
should be set when writing this command. Then the device information can be read from the bank, and an
actual data of memory cell be read from the another bank. Following the command write, a read cycle from
specific address retrives device information. Please note that output data of upper byte (DQ15 to DQ8) is “0”
in word mode (16 bit) read. Refer to “Common Flash Memory Interface Code Table” in sFLEXBLE SECTOR-
ERASE ARCHITECTURE. To terminate operation, it is necessary to write the read/reset command sequence
into the register. (See “Common Flash Memory Interface Code Table” in sFLEXIBLE SECTOR-ERASE
ARCHITECTURE.)
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