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| 型號(hào)： | MB9BF505RPMC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120 |
| 文件頁(yè)數(shù)： | 6/120頁(yè) |
| 文件大?。?/td> | 1277K |
| 代理商： | MB9BF505RPMC |
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103
8266D-MCU Wireless-06/12
ATmega128RFA1
9.12 Register Description
9.12.1 AES_CTRL – AES Control Register
Bit
7
6
5
4
3
2
1
0
NA ($13C)
AES_REQUEST
Res
AES_MODE
Res
AES_DIR AES_IM
Res1
Res0
AES_CTRL
Read/Write
RW
R
RW
R
RW
R
Initial Value
0
This register controls the operation of the security module. Do not access this register
during AES operation to read the AES core status. A read or write access to the register
stops the ongoing processing. To read the AES status use bit AES_DONE of register
AES_STATUS. Note that the AES_CTRL register is cleared when entering the radio
transceiver SLEEP state.
Bit 7 – AES_REQUEST - Request AES Operation.
A write access with AES_REQUEST = 1 initiates the AES operation.
Bit 6 – Res - Reserved Bit
This bit is reserved for future use. The result of a read access is undefined. The register
bit must always be written with the reset value.
Bit 5 – AES_MODE - Set AES Operation Mode
This register bit sets the AES operation mode (ECB/CBC Mode).
Table 9-28 AES_MODE Register Bits
Register Bits
Value
Description
0
AES Mode is ECB (Electronic Code Book).
AES_MODE
1
AES Mode is CBC (Cipher Block Chaining).
Bit 4 – Res - Reserved Bit
This bit is reserved for future use. The result of a read access is undefined. The register
bit must always be written with the reset value.
Bit 3 – AES_DIR - Set AES Operation Direction
This register bit sets the AES operation direction to either encryption or decryption.
Table 9-29 AES_DIR Register Bits
Register Bits
Value
Description
0
AES operation is encryption.
AES_DIR
1
AES operation is decryption.
Bit 2 – AES_IM - AES Interrupt Enable
This register bit is used to enable the AES interrupt.
Bit 1:0 – Res1:0 - Reserved Bit
These bits are reserved for future use. The result of a read access is undefined. The
register bits must always be written with the reset value.
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| MB9BF506NABGL-GE1 | 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 112BGA 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 112BGA, Controller Family/Series:ARM Cortex-M3, Core |
| MB9BF506NAPMC-G-JNE1 | 制造商:FUJITSU 功能描述: 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP, Controller Family/Series:ARM Cortex-M3, Core Size:32bit, No. of I/O's:80, Supply Voltage Min:2.7V, Supply Voltage Max:5.5V, Digital IC Case Style:LQFP, No. of Pins:100, Program Memory Size:512KB, , RoHS Compliant: Yes |
| MB9BF506NBBGL-GE1 | 制造商:FUJITSU 功能描述: |
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