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| 型號(hào)： | MB9AF311NPMC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 109/114頁(yè) |
| 文件大?。?/td> | 1357K |
| 代理商： | MB9AF311NPMC |
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ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
94
15.9.2 TCCR0B – Timer/Counter Control Register B
Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when operating
in PWM mode. When writing a logical one to the FOC0A bit, an immediate compare match is forced on the waveform
generation unit. The OC0A output is changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is
implemented as a strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the forced
compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0A as TOP.
The FOC0A bit is always read as zero.
Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when operating
in PWM mode. When writing a logical one to the FOC0B bit, an immediate compare match is forced on the waveform
generation unit. The OC0B output is changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is
implemented as a strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the forced
compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0B as TOP.
The FOC0B bit is always read as zero.
Bits 5:4 – Reserved
These bits are reserved bits in the Atmel ATmega48PA/88PA/168PA and will always read as zero.
Bit 3 – WGM02: Waveform Generation Mode
See the description in the Section 15.9.1 “TCCR0A – Timer/Counter Control Register A” on page 91.
Bits 2:0 – CS02:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the counter even if the pin is
configured as an output. This feature allows software control of the counting.
Bit
7
6
5
4
3
2
1
0
FOC0A
FOC0B
–
WGM02
CS02
CS01
CS00
TCCR0B
Read/Write
W
R
R/W
Initial Value
0
Table 15-9. Clock Select Bit Description
CS02
CS01
CS00
Description
0
No clock source (timer/ccounter stopped)
0
1
clkI/O/(no prescaling)
0
1
0
clkI/O/8 (from prescaler)
0
1
clkI/O/64 (from prescaler)
1
0
clkI/O/256 (from prescaler)
1
0
1
clkI/O/1024 (from prescaler)
1
0
External clock source on T0 pin. Clock on falling edge.
1
External clock source on T0 pin. Clock on rising edge.
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| MB9AF312KPMC-ES-E1 | 制造商:FUJITSU 功能描述: |
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