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參數(shù)資料
| 型號： | MB96F356RSBPMC-GSE2 |
| 廠商： | Fujitsu Semiconductor America Inc |
| 文件頁數(shù)： | 62/110頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 288KB FLASH/ROM 64LQFP |
| 標準包裝： | 1 |
| 系列： | F²MC MB96350 |
| 核心處理器： | F²MC-16FX |
| 芯體尺寸： | 16-位 |
| 速度： | 56MHz |
| 連通性： | CAN，EBI/EMI，I²C，LIN，SCI，UART/USART |
| 外圍設備： | DMA，LVD，LVR，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 51 |
| 程序存儲器容量： | 288KB（288K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 12K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉換器： | A/D 15x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 64-LQFP |
| 包裝： | 托盤 |
| 其它名稱： | 865-1087 |
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MB96350 Series
FME-MB96350 rev 7
55
*2: VI and VO should not exceed VCC + 0.3 V. VI should also not exceed the specied ratings. However if the
maximum current to/from a input is limited by some means with external components, the ICLAMP rating super-
sedes the VI rating. Input/output voltages of standard ports depend on VCC.
*3:
Applicable to all general purpose I/O pins (Pnn_m)
Use within recommended operating conditions.
Use at DC voltage (current)
The +B signal should always be applied a limiting resistance placed between the +B signal and the
microcontroller.
The value of the limiting resistance should be set so that when the +B signal is applied the input current to
the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods.
Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input
potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect
other devices.
Note that if a +B signal is input when the microcontroller power supply is off (not xed at 0 V), the power
supply is provided from the pins, so that incomplete operation may result.
Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting
supply voltage may not be sufcient to operate the Power reset (except devices with persistent low voltage
reset in internal vector mode).
Sample recommended circuits:
*4: The maximum permitted power dissipation depends on the ambient temperature, the air ow velocity and the
thermal conductance of the package on the PCB.
The actual power dissipation depends on the customer application and can be calculated as follows:
PD = PIO + PINT
PIO =
∑ (VOL * IOL + VOH * IOH) (IO load power dissipation, sum is performed on all IO ports)
PINT = VCC * (ICC + IA) (internal power dissipation)
ICC is the total core current consumption into VCC as described in the “DC characteristics” and depends on the
selected operation mode and clock frequency and the usage of functions like Flash programming or the clock
modulator.
IA is the analog current consumption into AVCC.
*5: Worst case value for a package mounted on single layer PCB at specied TA without air ow.
*6: Please contact Fujitsu for reliability limitations when using under these conditions.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
P-ch
N-ch
VCC
R
Protective Diode
Limiting
resistance
+B input (0V to 16V)
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