參數(shù)資料
型號(hào): MB91F467DBPVSR-GSE2
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP208
封裝: 28 X 28 MM, 3.95 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, QFP-208
文件頁數(shù): 64/141頁
文件大?。?/td> 3018K
代理商: MB91F467DBPVSR-GSE2
MB91460D Series
29
4.3.
CCR (Condition Code Register)
SV : Supervisor ag
S
: Stack ag
I
: Interrupt enable ag
N
: Negative enable ag
Z
: Zero ag
V
: Overow ag
C
: Carry ag
4.4.
SCR (System Condition Register)
Flag for step division (D1, D0)
This ag stores interim data during execution of step division.
Step trace trap ag (T)
This ag indicates whether the step trace trap is enabled or disabled.
The step trace trap function is used by emulators. When an emulator is in use, it cannot be used in execution
of user programs.
4.5.
ILM (Interrupt Level Mask register)
This register stores interrupt level mask values, and the values stored in ILM4 to ILM0 are used for level masking.
The register is initialized to value “01111B” at reset.
4.6.
PC (Program Counter)
The program counter indicates the address of the instruction that is being executed.
The initial value at reset is undened.
- 000XXXXB
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
C
V
Z
N
I
S
SV
Initial value
bit 10
bit 8
bit 9
D1
D0
T
XX0B
Initial value
bit 18
bit 16
bit 17
ILM2 ILM1 ILM0
01111B
ILM3
ILM4
bit 20 bit 19
Initial value
bit 0
bit 31
XXXXXXXXH
Initial value
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