參數(shù)資料
型號(hào): MB91F366GB
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 63.33 MHz, RISC MICROCONTROLLER, PQFP120
封裝: PLASTIC, QFP-120
文件頁(yè)數(shù): 14/64頁(yè)
文件大?。?/td> 800K
代理商: MB91F366GB
FME / EMDC / Br - mb91f365g_f366g_ds.fm
21
9-Jan-02
CHAPTER 2
Additional Information
2.1
Flash Interface
2.1.2 Flash Control Status Register (FMCS) on F365GB/F366GB
On MB91366GA this register has no function for the application, however when writing to this register bits
6 and 5 must always be written with “11”.
Bit 7: FACCEN: Controls read access mode to flash
0: Synchronous access using ATDIN and EQIN signals - recommended setting for read
access to the flash memory
1: Asynchronous access, this setting should be used in case of write access
Bits 6,5: reserved
when writing to these bits always write "11"
Bit 4: RDYEG:
When the auto algorithm of flash memory is finished, this bit is set to '1'.
This bit is cleared by reading it.
0: Auto algorithm not yet finished
1: Auto algorithm finished
Bit 3: RDY:
The state of auto algorithm
0:The state of the auto algorithm is WRITE/READ. Can't accept WRITE/READ/DELETE.
1:It is possible to accept WRITE/READ/DELETE.
Bit 2: RDYI: Reserved bit
Bit 1: WE: This bit is used to control writing and reading to flash memory in CPU mode
0: writing to flash memory is disabled, read access is 32 bit wide
1: writing enabled, read access 16 bit wide, auto algorithm can be used
This bit can only be written to if RDY is 1.
address
bit 7
bit6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
00007000H
FACCEN
----
RDYEG
RDY
RDYI
WE
LPM
access
R/W
R
R/W
initial
value
1
10X
0
value after
Boot ROM
0
1
10X
0
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