MB91133/MB91F133
116
20-bit normal branch macro instructions
*1: CALL20
(1) If label20 – PC – 2 is between –0x800 and +0x7fe, instruction is generated as follows;
CALL
label12
(2) If label20 – PC – 2 is outside of the range given in (1) or includes external reference symbol, instruction is
generated as follows;
LDI:20
#label20, Ri
CALL
@Ri
*2: BRA20
(1) If label20 – PC – 2 is between –0x100 and +0xfe, instruction is generated as follows;
BRA
label9
(2) If label20 – PC – 2 is outside of the range given in (1) or includes external reference symbol, instruction is
generated as follows;
LDI:20
#label20, Ri
JMP
@Ri
*3: Bcc20 (BEQ20 to BHI20)
(1) If label20 – PC – 2 is between –0x100 and +0xfe, instruction is generated as follows;
Bcc
label9
(2) If label20 – PC – 2 is outside of the range given in (1) or includes external reference symbol, instruction is
generated as follows;
Bxcc
false
xcc is a revolt condition of cc
LDI:20
#label20, Ri
JMP
@Ri
false:
Mnemonic
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
label20, Ri
Operation
Remarks
* CALL20
* BRA20
* BEQ20
* BNE20
* BC20
* BNC20
* BN20
* BP20
* BV20
* BNV20
* BLT20
* BGE20
* BLE20
* BGT20
* BLS20
* BHI20
Next instruction address
→
RP label20
→
PC
label20
→
PC
if (Z = = 1) then label20
→
PC
ifs/Z = = 0
ifs/C = = 1
ifs/C = = 0
ifs/N = = 1
ifs/N = = 0
ifs/V = = 1
ifs/V = = 0
ifs/V xor N = = 1
ifs/V xor N = = 0
ifs/(V xor N) or Z = = 1
ifs/(V xor N) or Z = = 0
ifs/C or Z = = 1
ifs/C or Z = = 0
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
Ri: Temporary register
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