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MB90480 Series
20
(Continued)
Address
Register name
Abbreviated
register
name
Read/
Write
Resource name
Initial value
4AH
Output compare register (ch0) lower digits
OCCP0
R/W
16-bit output timer
output compare
(ch0-ch5)
0 0 0 0 0 0 0 0
4BH
Output compare register (ch0) upper digits
0 0 0 0 0 0 0 0
4CH
Output compare register (ch1) lower digits
OCCP1
R/W
0 0 0 0 0 0 0 0
4DH
Output compare register (ch1) upper digits
0 0 0 0 0 0 0 0
4EH
Output compare register (ch2) lower digits
OCCP2
R/W
0 0 0 0 0 0 0 0
4FH
Output compare register (ch2) upper digits
0 0 0 0 0 0 0 0
50H
Output compare register (ch3) lower digits
OCCP3
R/W
0 0 0 0 0 0 0 0
51H
Output compare register (ch3) upper digits
0 0 0 0 0 0 0 0
52H
Output compare register (ch4) lower digits
OCCP4
R/W
0 0 0 0 0 0 0 0
53H
Output compare register (ch4) upper digits
0 0 0 0 0 0 0 0
54H
Output compare register (ch5) lower digits
OCCP5
R/W
0 0 0 0 0 0 0 0
55H
Output compare register (ch5) upper digits
0 0 0 0 0 0 0 0
56H
Output compare control register (ch0)
OCS0
R/W
0 0 0 0 - - 0 0
57H
Output compare control register (ch1)
OCS1
R/W
- - - 0 0 0 0 0
58H
Output compare control register (ch2)
OCS2
R/W
0 0 0 0 - - 0 0
59H
Output compare control register (ch3)
OCS3
R/W
- - - 0 0 0 0 0
5AH
Output compare control register (ch4)
OCS4
R/W
16-bit output timer
OCU (ch4, ch5)
0 0 0 0 - - 0 0
5BH
Output compare control register (ch5)
OCS5
R/W
- - - 0 0 0 0 0
5CH
Input capture register (ch0) lower digits
IPCP0
R
16-bit output timer
input capture
(ch0, ch1)
XXXXXXXX
5DH
Input capture register (ch0) upper digits
R
XXXXXXXX
5EH
Input capture register (ch1) lower digits
IPCP1
R
XXXXXXXX
5FH
Input capture register (ch1) upper digits
R
XXXXXXXX
60H
Input capture control register
ICS01
R/W
0 0 0 0 0 0 0 0
61H
(Reserved area)
62H
Timer data register lower digits
TCDT
R/W
16-bit output timer
free run timer
0 0 0 0 0 0 0 0
63H
Timer data register upper digits
TCDT
R/W
0 0 0 0 0 0 0 0
64H
Timer control status register
TCCS
R/W
0 0 0 0 0 0 0 0
65H
Timer control status register
TCCS
R/W
0 - - 0 0 0 0 0
66H
Compare clear register lower digits
CPCLR
R/W
XXXXXXXX
67H
Compare clear register upper digits
XXXXXXXX
68H
Up/down count register ch0
UDCR0
R
8/16-bit up/down
timer counter
0 0 0 0 0 0 0 0
69H
Up/down count register ch1
UDCR1
R
0 0 0 0 0 0 0 0
6AH
Reload compare register ch0
RCR0
W
0 0 0 0 0 0 0 0
6BH
Reload compare register ch1
RCR1
W
0 0 0 0 0 0 0 0
6CH
Counter control register lower digits ch0
CCRL0
R/W
0 X 0 0 X 0 0 0
6DH
Counter control register upper digits ch0
CCRH0
R/W
0 0 0 0 0 0 0 0
6EH
(Reserved area)
6FH
ROM mirror function select register
ROMM
R/W
ROM mirroring
function
- - - - - - 0 1