
MB90360E Series
52
About the external impedance of analog input and its sampling time
A/D converter with sample and hold circuit. If the external impedance is too high to keep sufficient sampling
time, the analog voltage changed to the internal sample and hold capacitor is insufficient, adversely affecting A/
D conversion precision. Therefore, to satisfy the A/D conversion precision standard, consider the relationship
between the external impedance and minimum sampling time and either adjust the resistor value and operating
frequency or decrease the external impedance so that the sampling time is longer than the minimum value. And,
if the sampling time cannot be sufficient, connect a capacitor of about 0.1
μF to the analog input pin.
R
C
Analog input equivalent circuit model
Analog input
During sampling : ON
Comparator
MB90F362E/TE/ES/TES, MB90F367E/TE/ES/TES
MB90362E/TE/ES/TES, MB90367E/TE/ES/TES,
MB90V340E-101/102/103/104
RC
4.5 V
≤ AVCC ≤ 5.5 V
2.0 k
Ω (Max)
16.0 pF (Max)
4.0 V
≤ AVCC < 4.5 V
8.2 k
Ω (Max)
16.0 pF (Max)
RC
4.5 V
≤ AVCC ≤ 5.5 V
2.0 k
Ω (Max)
14.4 pF (Max)
4.0 V
≤ AVCC < 4.5 V
8.2 k
Ω (Max)
14.4 pF (Max)
Note : The values are reference values.