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377
INDEX
read-modify-write operation ................................. 356
receive interrupt ................................................... 319
receiving errors in asynchronous mode ............... 323
receiving operation in asynchronous mode ......... 323
register bank pointer (RP), structure of.................. 36
regulator recovery time .................................... 59, 71
reset flag register (RSFR) ...................................... 55
reset operation, overview of ................................... 58
reset source ........................................................... 54
ROM area .............................................................. 26
S
serial input data register (SIDR1/2)...................... 316
serial mode control register 1 (SMC11/21) .......... 310
serial mode control register 2 (SMC12/22) .......... 312
serial output data register (SODR1/2).................. 317
serial rate control register (SRC1/2) .................... 318
serial status and rate register (SSD1/2) ............... 314
single-chip mode.................................................... 88
sleep mode, operation of ....................................... 76
special instruction ................................................ 352
speed-shift (main clock speed-switching) function
..................................................................... 70
square wave output initial setting function, operation
of................................................................ 247
stack operation at interrupt return .......................... 51
stack operation at start of interrupt processing ...... 51
stack pointer (SP) .................................................. 32
standby control register (STBC)............................. 79
standby mode and interrupts, changing to ............. 86
standby mode or operation halt, operation during
................................................................... 250
standby modes....................................................... 74
start bit during receiving operation, detecting ...... 324
state transition diagram.......................................... 81
state transition diagram 2 (one-clock option) ......... 84
stop mode, operation of ......................................... 77
storing 16-bit data in RAM ..................................... 30
storing 16-bit data on stack.................................... 30
storing 16-bit operands .......................................... 30
subclock mode, operation of .................................. 70
sub-sleep mode ..................................................... 74
sub-stop mode ....................................................... 74
system clock control register (SYCC), structure of
..................................................................... 67
T
temporary accumulator (T)..................................... 32
timebase timer control register (TBTC)................ 140
timebase timer interrupt........................................142
timebase timer interrupt, register and vector table for
...................................................................142
timebase timer, block diagram of..........................138
timebase timer, note on using ..............................145
timebase timer, operation of .................................144
timebase timer, program example for...................147
timer 11/21 control register (T1/3CR) ...................231
timer 11/21 data register (T1/3DR).......................235
timer 12/22 control register (T2/4CR) ...................233
timer 12/22 data register (T2/4DR).......................237
timer stop and restart............................................249
transfer instruction ................................................357
transmission data format ......................................322
transmission operation in clock asynchronous mode
...................................................................324
transmit interrupt...................................................319
U
UART registers .....................................................309
UART/SIO Function..............................................304
UART/SIO pin, block diagram of ..........................308
UART/SIO pins .....................................................307
UART/SIO, block diagram of ................................305
UART/SIO, operation of........................................320
V
vector table area .....................................................28
W
wake-up from standby mode by interrupt ...............86
watch interrupt ......................................................166
watch mode ............................................................74
watch mode, operation of .......................................78
watch prescaler control register (WPCR) .............164
watch prescaler interrupt, register and vector table for
...................................................................166
watch prescaler, block diagram of ........................162
watch prescaler, notes on using ...........................169
watch prescaler, operation of ...............................167
watch prescaler, overview ....................................160
watch prescaler, program example for .................171
watchdog timer control register (WDTC) ..............153
watchdog timer function........................................150
watchdog timer, block diagram of .........................151
watchdog timer, notes on using............................157
watchdog timer, operation of ................................155
writing data to OTPROM ......................................370