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參數(shù)資料
| 型號(hào)： | MB89F538-101P |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PDIP64 |
| 封裝： | 17 X 58 MM, 5.65 MM HEIGHT, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-64 |
| 文件頁(yè)數(shù)： | 42/72頁(yè) |
| 文件大?。?/td> | 2290K |
| 代理商： | MB89F538-101P |
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MB89530A Series
DS07-12547-7E
47
(7) I2C Timing
(VCC
= 5.0 V, AVss = Vss = 0 V, TA = 40 °C to +85 °C)
Notes :
For tinst refer to “ (4) Instruction Cycle”.
The value “m” in the above table is the value from the shift clock frequency setting bits (CS4, CS3) in the
I2C clock control register “ICCR”. For details, refer to the register description in the hardware manual.
The value ’n’ in the above table is the value from the shift clock frequency setting bits (CS2, CS0) in the
I2C clock control register “ICCR”. For details, refer to the register description in the hardware manual.
tDOSU appears when the interrupt period is longer than the SCL “L” width.
The rated values for SDA and SCL assume a start up time of 0 ns.
Parameter
Symbol
Pin
name
Condition
Value
Unit Remarks
Min
Max
Start condition output
tSTA
SCL
SDA
1
/ 4 tinst ×
m
× n 20
1
/ 4 tinst ×
m
× n + 20
ns
Master
only
Stop condition output
tSTO
SCL
SDA
1
/ 4 tinst ×
(m
× n + 8) 20
1
/ 4 tinst ×
(m
× n + 8) + 20
ns
Master
only
Start condition detection
tSTA
SCL
SDA
1
/ 4 tinst × 6 + 40
ns
Stop condition detection
tSTO
SCL
SDA
1
/ 4 tinst × 6 + 40
ns
Restart condition output
tSTASU
SCL
SDA
1
/ 4 tinst ×
(m
× n + 8) 20
1
/ 4 tinst ×
(m
× n + 8) + 20
ns
Master
only
Restart condition detection
tSTASU
SCL
SDA
1
/ 4 tinst × 4 + 40
ns
SCL output “L” width
tLOW
SCL
1
/ 4 tinst ×
m
× n 20
1
/ 4 tinst ×
m
× n + 20
ns
Master
only
SCL output “H” width
tHIGH
SCL
1
/ 4 tinst ×
(m
× n + 8) 20
1
/ 4 tinst ×
(m
× n + 8) + 20
ns
Master
only
SDA output delay time
tDO
SDA
1
/ 4 tinst × 4 20 1 / 4 tinst × 4 + 20 ns
Setup after SDA output
interrupt interval
tDOSU
SDA
1
/ 4 tinst × 4 20
ns
SCL input “L” width
tLOW
SCL
1
/ 4 tinst × 6 + 40
ns
SCL input “H” width
tHIGH
SCL
1
/ 4 tinst × 2 + 40
ns
SDA input setup
tSU
SDA
40
ns
SDA input hold
tHO
SDA
0
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB89F538-101PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS, F-2MC-8L MB89530A Series |
| MB89F538-101PFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS, F-2MC-8L MB89530A Series |
| MB89F538-101PMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB89F538-101P-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller CMOS, F-2MC-8L MB89530A Series |
| MB89F538-101PV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Original Microcontroller |
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