參數(shù)資料
型號： MAX98089ETN+
廠商： Maxim Integrated Products
文件頁數(shù)： 21/131頁
文件大?。?/td> 0K
描述： IC CODEC AUDIO FLEXSOUND 56TQFN
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 43
系列： FlexSound™
類型： 立體聲音頻
數(shù)據(jù)接口： I²C，串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 無
S/N 比，標準 ADC / DAC (db)： 93 / 101
動態(tài)范圍，標準 ADC / DAC (db)： 93 / 101
電壓 - 電源，模擬： 1.65 V ~ 2 V
電壓 - 電源，數(shù)字： 1.65 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-WFQFN 裸露焊盤
供應商設備封裝： 56-TQFN-EP（7x7）
包裝： 管件
Low-Power, Stereo Audio Codec
with FlexSound Technology
Table 36. Status and Interrupt Registers
Device Status
The IC uses register 0x00 and IRQ to report the status of
various device functions. The status register bits are set
when their respective events occur, and cleared upon
reading the register. Device status can be determined
either by poling register 0x00 or configuring the IRQ to
pull low when specific events occur. IRQ is an open-drain
output that requires a pullup resistor for proper operation.
Register 0x0F determines which bits in the status register
trigger IRQ to pull low.
REGISTER
BIT
NAME
DESCRIPTION
0x00
(Read Only)
7
CLD
Full Scale
0 = All digital signals are less than full scale.
1 = The DAC or ADC signal path has reached or exceeded full scale. This typically
indicates clipping.
6
SLD
Volume Slew Complete
SLD reports that any of the programmable-gain arrays or volume controllers has com-
pleted slewing from a previous setting to a new programmed setting. If multiple gain
arrays or volume controllers are changed at the same time, the SLD flag is set after the
last volume slew completes. SLD also reports when the digital audio interface soft-start
or soft-stop process has completed. MCLK is required for proper SLD operation.
0 = No volume slewing sequences have completed since the status register was last
read.
1 = Volume slewing complete.
5
ULK
Digital Audio Interface Unlocked
0 = Both digital audio interfaces are operating normally.
1 = Either digital audio interface is configured incorrectly or receiving invalid clocks.
1
JDET
Jack Configuration Change
JDET reports changes to any bit in the Jack Status register (0x02). Changes to the Jack
Status bits are debounced before setting JDET. The debounce period is programmable
using the JDEB bits. JDET is always set the first time JDETEN or SHDN is set the first time
power is applied to the IC. Read the status register following such an event to clear JDET
and allow for proper jack detection.
0 = No change in jack configuration.
1 = Jack configuration has changed.
0x0F
7
ICLD
Full-Scale Interrupt Enable
0 = Disabled
1 = Enabled
6
ISLD
Volume Slew Complete Interrupt Enable
0 = Disabled
1 = Enabled
5
IULK
Digital Audio Interface Unlocked Interrupt Enable
0 = Disabled
1 = Enabled
1
IJDET
Jack Configuration Change Interrupt Enable
0 = Disabled
1 = Enabled
Maxim Integrated
117
MAX98089
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相關代理商/技術參數(shù)
參數(shù)描述
MAX98089ETN+ 功能描述:接口—CODEC Audio Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
MAX98089ETN+T 功能描述:接口—CODEC Audio Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
MAX98089EVKIT#TQFN 功能描述:音頻 IC 開發(fā)工具 MAX98089 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
MAX98089EVKIT#WLP 功能描述:音頻 IC 開發(fā)工具 MAX98089 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
MAX98089EVKIT+TQFN 功能描述:音頻 IC 開發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
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