參數(shù)資料
型號(hào): MAX9597CTI+T
廠商: Maxim Integrated Products
文件頁數(shù): 6/32頁
文件大?。?/td> 0K
描述: IC AUD/VID INTERACE 28TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 音頻/視頻接口
應(yīng)用: DVD,機(jī)頂盒
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-TQFN-EP(5x5)
包裝: 帶卷 (TR)
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
14
______________________________________________________________________________________
video transmitter circuit might have a different ground
than the video receiver, thereby level shifting the DC
bias. The 50Hz power line hum might cause the video
signal to change DC bias slowly.
Internal video signals that are between 0V and 1V can
be DC-coupled. Most video DACs generate video sig-
nals between 0V and 1V because the video DAC
sources current into a ground-referenced resistor. For
the minority of video DACs that generate video signals
between 2.3V and 3.3V because the video DAC sinks
current from a VDD-referenced resistor, AC-couple the
video signal to the MAX9597.
The MAX9597 restores the DC level of incoming,
AC-coupled video signals with either transparent sync-
tip clamps or bias circuits. When using an AC-coupled
input, the transparent sync-tip clamp automatically
clamps the input signal minimum to ground, preventing it
from going lower. A small current of 2A pulls down on
the input to prevent an AC-coupled signal from drifting
outside the input range of the part. The transparent sync-
tip clamp is used with CVBS, RGB, and luma signals.
The transparent sync-tip clamp is transparent when the
incoming video signal is DC-coupled and at ground or
above. Under such conditions, the clamp never acti-
vates. Therefore, the outputs of video DACs that gener-
ate signals between 0V and 1V can be directly
connected to the MAX9597 inputs.
The bias circuit accepts AC-coupled chroma, which is
a subcarrier with the color information modulated onto
it. The bias voltage of the bias circuits is around
600mV.
ENC_R/C_IN can receive either a red video signal or a
chroma video signal. Set the input configuration by writ-
ing to bit 3 of register 08h. See Table 10.
TV_CVBS_OUT
CLAMP/BIAS
ENC_R/C_IN
CLAMP
ENC_CVBS_IN
TV_R/C_OUT
ENC_G_IN
TV_G_OUT
ENC_B_IN
TV_B_OUT
VVID
GND
TV_FS_OUT
V12
EP
+6V
CLAMP
TV_SS_OUT
AV = 2V/V
AV = 1V/V
MAX9597
LPF
Figure 3. MAX9597 Video Section Function Diagram
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