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參數(shù)資料
| 型號： | MAX9325 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver |
| 中文描述： | 2:8差分LVPECL/LVECL/HSTL時鐘和數(shù)據(jù)驅(qū)動器 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 173K |
| 代理商： | MAX9325 |
M
1:5 Clock Driver with Selectable
LVPECL Inputs and LVDS Outputs
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(V
CC
- GND = 2.5V, outputs terminated with 100
±
1%, f
IN
= 1.0GHz, input transition time = 125ps (20% to 80%),V
IHD
= V
CC
- 1.0V,
V
ILD
= V
CC
- 1.5V, unless otherwise noted.)
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT (V
IHD
)
M
V
IHD
(V)
P
3.0
2.7
2.4
2.1
1.8
1.5
310
330
350
370
390
290
1.2
3.3
PROPAGATION DELAY vs. TEMPERATURE
M
TEMPERATURE (
°
C)
P
60
35
10
-15
320
340
360
380
400
300
-40
85
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
NAME
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
GND
FUNCTION
Noninverting Differential Output 0. Typically terminated with 100
to
Q0
.
Inverting Differential Output 0. Typically terminated with 100
to Q0.
Noninverting Differential Output 1. Typically terminated with 100
to
Q1
.
Inverting Differential Output 1. Typically terminated with 100
to Q1.
Noninverting Differential Output 2. Typically terminated with 100
to
Q2
.
Inverting Differential Output 2. Typically terminated with 100
to Q2.
Noninverting Differential Output 3. Typically terminated with 100
to
Q3
.
Inverting Differential Output 3. Typically terminated with 100
to Q3.
Noninverting Differential Output 4. Typically terminated with 100
to
Q4
.
Inverting Differential Output 4. Typically terminated with 100
to Q4.
Ground
12
CLKSEL
Clock Select Input. Drive low to select the CLK0,
CLK0
input. Drive high to select the CLK1,
CLK1
input. Internal 60k
pulldown to GND.
Noninverting Differential Clock Input 0. Internal 75k
pulldown to GND.
Inverting Differential Clock Input 0. Internal 75k
pullup to V
CC
and 75k
pulldown to GND.
Internally Connect. Do not connect externally.
Noninverting Differential Input 1. Internal 75k
pulldown to GND.
Inverting Differential Input 1. Internal 75k
pullup to V
CC
and 75k
pulldown to GND.
13
14
15
16
17
CLK0
CLK0
I.C.
CLK1
CLK1
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9325EGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX9325EQI | 制造商:Maxim Integrated Products 功能描述:2:8 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND - Rail/Tube |
| MAX9325EQI+ | 功能描述:時鐘驅(qū)動器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9325EQI+T | 功能描述:時鐘驅(qū)動器及分配 LVPECL/LVECL/HSTL Clock & Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9325EVKIT | 制造商:Maxim Integrated Products 功能描述:2:8 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND DATA DRIVER - Boxed Product (Development Kits) |
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