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參數(shù)資料
| 型號： | MAX9225ETE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SERIALIZER LP 16-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 功能： | 串行器/解串器 |
| 數(shù)據(jù)速率： | 200Mbps |
| 輸入類型： | 并聯(lián) |
| 輸出類型： | 并聯(lián) |
| 輸入數(shù)： | 10 |
| 輸出數(shù)： | 1 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TQFN-EP（3x3） |
| 包裝： | 管件 |
MAX9225/MAX9226
10-Bit, Low-Power, 10MHz-to-20MHz
Serializer and Deserializer Chipset
8
_______________________________________________________________________________________
Pin Description (MAX9225)
PIN
NAME
FUNCTION
1–7,
14, 15, 16
DIN6–DIN0,
DIN9, DIN8, DIN7
Single-Ended Parallel Data Inputs. The 10 data bits are loaded into the input latch on the rising
edge of PCLKIN. 1.71V to 3.465V tolerant. Internally pulled down to GND.
8
PCLKIN
Parallel Clock Input. The rising edge of PCLKIN (typically the pixel clock) latches the parallel
data input. Internally pulled down to GND.
9
PWRDN
Power-Down Input. Pull PWRDN low to place the MAX9225/MAX9226 in power-down mode.
Drive PWRDN high for normal operation. Internally pulled down to GND.
10
SDO-
Inverting LCDS Serial-Data Output
11
SDO+
Noninverting LCDS Serial-Data Output
12
GND
Ground
13
VDD
Core Supply Voltage. Bypass to GND with 0.1F and 0.01F capacitors in parallel as close to
the device as possible with the smallest value capacitor closest to the supply pin.
—
EP
Exposed Paddle. Connect EP to ground.
Pin Description (MAX9226)
PIN
NAME
FUNCTION
1
GND
Ground
2
SDI+
Noninverting LCDS Serial-Data Input
3
SDI-
Inverting LCDS Serial-Data Input
4VDD
Core Supply Voltage. Bypass to GND with 0.1F and 0.01F capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.
5
PCLKOUT
Parallel Clock Output. Parallel output data are valid on the rising edge of PCLKOUT (typically
the pixel clock).
6–15
DOUT0–DOUT9
Single-Ended Parallel Data Output. DOUT[9:0] are valid on the rising edge of PCLKOUT.
16
VDDO
Output Supply Voltage. Bypass to GND with 0.1F and 0.01F capacitors in parallel as close to
the device as possible with the smallest value capacitor closest to the supply pin.
—
EP
Exposed Paddle. Connect EP to ground.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9225ETE+ | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9225ETE+T | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9225ETE-T | 制造商:Maxim Integrated Products 功能描述:10-BIT LOW-POWER 10MHZ TO 20MHZ S - Tape and Reel |
| MAX9225EVKIT | 制造商:Maxim Integrated Products 功能描述:10-BIT LOW-POWER 10MHZ TO 20MHZ S - Rail/Tube |
| MAX9226ETE | 制造商:Maxim Integrated Products 功能描述:10-BIT LOW-POWER 10MHZ TO 20MHZ S - Rail/Tube |
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