參數(shù)資料
型號(hào): MAX9178EUE
廠(chǎng)商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 通用總線(xiàn)功能
英文描述: Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout
中文描述: QUAD LINE DRIVER, PDSO16
封裝: 4.40 MM, TSSOP-16
文件頁(yè)數(shù): 10/14頁(yè)
文件大?。?/td> 319K
代理商: MAX9178EUE
M
Maintain the distance between the differential traces to
avoid discontinuities in differential impedance.
Minimize the number of vias to further prevent imped-
ance discontinuities.
Cables and Connectors
Transmission media should have a nominal differential
impedance of 100
. To minimize impedance disconti-
nuities, use cables and connectors that have matched
differential impedance.
Balanced cables such as twisted pair offer superior
signal quality and tend to generate less EMI due to
canceling effects. Balanced cables tend to pick up
noise as common mode, which is rejected by the LVDS
receiver.
Overshoot and Undershoot
Voltage Protection
The MAX9178 is designed to protect the inputs (IN_,
EN, and
EN
) against latchup due to transient overshoot
and undershoot voltage. If the input voltage goes
above V
CC
or below GND by up to 1V, an internal cir-
cuit limits input current to 1.5mA.
IEC 61000-4-2 Level 4
ESD Protection
The IEC 61000-4-2 standard specifies ESD tolerance
for electronic systems. The IEC 61000-4-2 model
(Figure 8) specifies a 150pF capacitor that is dis-
charged into the device through a 330
resistor. The
MAX9178 outputs are rated for IEC 61000-4-2 level 4
(
±
8kV Contact Discharge and
±
15kV Air Discharge).
The Human Body Model (HBM, Figure 9) specifies a
100pF capacitor that is discharged into the device
through a 1.5k
resistor.
The IEC 61000-4-2 circuit discharges higher peak cur-
rent and more energy than the HBM circuit due to the
lower series resistance and larger capacitor.
Board Layout
A four-layer PC board that provides separate power,
ground, LVDS signals, and input signals is recom-
mended. Separate the LVTTL/LVCMOS and LVDS sig-
nals to prevent coupling.
Quad LVDS Line Driver with High-ESD
Tolerance and Flow-Through Pinout
10
______________________________________________________________________________________
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
R
C
50
TO 100
R
D
330
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 8. IEC 61000-4-2 Contact Discharge ESD Test Model
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
R
C
1M
R
D
1.5k
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 9. Human Body ESD Test Model
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