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參數資料
| 型號： | MAX9173ETE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad LVDS Line Receiver with Flow-Through Pinout and “In-Path” Fail-Safe |
| 中文描述： | QUAD LINE RECEIVER, QCC16 |
| 封裝： | 3 X 3 MM, 0.80 MM HEIGHT, EXPOSED PAD, TQFN-16 |
| 文件頁數： | 2/14頁 |
| 文件大?。?/td> | 285K |
| 代理商： | MAX9173ETE |
M
Quad LVDS Line Receiver with Flow-Through
Pinout and “In-Path” Fail-Safe
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ..........................................................-0.3V to +4.0V
IN_+, IN_- to GND.................................................-0.3V to +4.0V
OUT_, EN,
EN
to GND................................-0.3V to (V
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70
°
C)
16-Pin TSSOP (derate 9.4mW/
°
C above T
A
= +70
°
C)..755mW
16-Pin SO (derate 8.7mW/
°
C above T
A
= +70
°
C) ........696mW
16-Pin QFN (derate 14.7mW/
°
C above T
A
= +70
°
C)..1177mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Junction Temperature......................................................+150
°
C
Storage Temperature Range.............................-65
°
C to +150
°
C
ESD Protection (Human Body Model, IN_+, IN_-) ............
±
7.0kV
Lead Temperature (soldering, 10s).................................+300
°
C
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.1V to 1.2V, common-mode input voltage V
CM
= |V
ID
/2| to V
CC
- |V
ID
/2|, outputs
enabled, and T
A
= -40
°
C to +85
°
C. Typical values are at V
CC
= 3.3V, V
CM
= 1.2V, |V
ID
| = 0.2V, and T
A
= +25
°
C, unless otherwise
noted.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVDS INPUTS (IN_+, IN_-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current (Noninverting Input)
V
TH
V
TL
I
IN_+
-45
-45
-2.5
0
mV
mV
μA
-100
+0.5
Figure 1
-5
Power-Off Input Current
(Noninverting Input)
I
IN_+OFF
V
IN_+
= 0 to 3.6V, V
IN_-
= 0 to 3.6V,
V
CC
= 0 or open (Figure 1)
Figure 1
-0.5
0
+0.5
μA
Input Current (Inverting Input)
I
IN_-
-0.5
+5.0
+10
μA
Power-Off Input Current
(Inverting Input)
I
IN_-OFF
V
IN_+
= 0 to 3.6V, V
IN_-
= 0 to 3.6V,
V
CC
= 0 or open, Figure 1
-0.5
0
+0.5
μA
LVCMOS/LVTTL OUTPUTS (OUT_)
Open, undriven short, or
undriven parallel termination
2.7
3.2
Output High Voltage (Table 1)
V
OH
I
OH
= -4.0mA
V
ID
= 0
2.7
3.2
0.1
-77
V
Output Low Voltage
Output Short-Circuit Current
Output High-Impedance Current
LOGIC INPUTS (EN,
EN
)
Input High Voltage
Input Low Voltage
Input Current
Input Clamp Voltage
POWER SUPPLY
Supply Current
Disabled Supply Current
V
OL
I
OS
I
OZ
I
OL
= +4.0mA, V
ID
= -100mV
V
OUT_
= 0 (Note 3)
Disabled, V
OUT_
= 0 or V
CC
0.25
-120
+1
V
-45
-1
mA
μA
V
IH
V
IL
I
IN
V
CL
2.0
0
-15
V
CC
0.8
+15
-1.5
V
V
V
IN
= high or low
I
CL
= -18mA
μA
V
-0.88
I
CC
I
CCZ
Inputs open
Disabled, inputs open
12
0.56
15
1.0
mA
mA
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