參數(shù)資料
型號(hào): MAX9164
廠商: Maxim Integrated Products, Inc.
元件分類: 外設(shè)及接口
英文描述: Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C
中文描述: 電可擦除可編程邏輯器件
文件頁(yè)數(shù): 3/10頁(yè)
文件大小: 236K
代理商: MAX9164
M
3.3V Single LVDS Driver/Receiver
_______________________________________________________________________________________
3
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 3.0V to 3.6V, |V
ID
| = 0.1V to 2.4V, common-mode input voltage (V
CM
) = |V
ID
/2| to 2.4V - |V
ID
|/2, R
L
= 100
±1%, T
A
= -40
°
C to
+85
°
C. Typical values are at V
CC
= 3.3V, |V
ID
| = 0.2V, V
CM
= 1.2V, T
A
= +25
°
C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYMBOL
SUPPLY CURRENT
Supply Current
I
CC
DE = V
CC
,
RE
= 0
Driver Supply Current
I
CCD
DE =
RE
= V
CC
Receiver Supply Current
I
CCR
DE =
RE
= 0
Disable Supply Current
I
CCZ
DE = 0,
RE
= V
CC
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, |V
ID
| = 0.2V, V
CM
= 1.2V, R
L
= 100
±1%, C
L
= 10pF, T
A
= -40
°
C to +85
°
C. Typical values are at V
CC
= 3.3V,
|
V
ID
|
= 0.2V, V
CM
= 1.2V, T
A
= +25
°
C, unless otherwise noted.) (Notes 3, 4, 5)
Note 1:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100% tested
at T
A
= +25
°
C.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to device
ground except V
TH
, V
TL
, V
ID
, V
OD
, and
V
OD
.
Note 3:
C
L
includes probe and jig capacitance.
Note 4:
AC parameters are guaranteed by design and characterization.
Note 5:
Generator waveforms for all tests unless otherwise specified: f = 100MHz, Z
0
= 50
, t
R
= t
F
= 6.0ns (0 to 3V, 0% to 100%)
for DE and
RE
, t
R
= t
F
= 3.0ns (0 to 3V, 0% to 100%) for DIN, and t
R
= t
F
= 1.0ns (|V
ID
| = 0.2V, 20% to 80%) for RI+/RI-
inputs.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER
Differential High-to-Low Propagation Delay
Differential Low-to-High Propagation Delay
Differential Skew | t
PHLD
- t
PLHD
|
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
RECEIVER
Differential High-to-Low Propagation Delay
Differential Low-to-High Propagation Delay
Differential Skew | t
PHL
- t
PLH
|
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
t
PHLD
t
PLHD
t
SKD
t
TLHD
t
THLD
t
PHZ
t
PLZ
t
PZH
t
PZL
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 3
Figure 3
Figure 3
Figure 3
2.0
1.0
4.4
4.2
0.2
0.9
0.8
6.0
5.5
5.5
5.0
6.5
7.0
1.0
3.0
3.0
8.0
9.0
8.0
8.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.2
0.2
1.5
2.5
4.0
3.8
t
PHL
t
PLH
T
SK
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
Figure 4
Figure 4
Figure 4
Figure 4
Figure 4
Figure 5
Figure 5
Figure 5
Figure 5
3.0
3.0
5.4
5.3
0.14
0.8
0.4
5.4
5.1
5.4
5.1
7.0
9.0
1.5
3.0
3.0
6.0
6.0
8.0
8.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.15
0.15
3.0
3.0
3.0
3.0
CONDITIONS
MIN
TYP
MAX
UNITS
7.4
7.4
4.4
4.4
12.5
12.5
7.0
7.0
mA
mA
mA
mA
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