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參數(shù)資料
| 型號(hào)： | MAX9159 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Dual LVDS Line Receiver |
| 中文描述： | 雙路LVDS線(xiàn)接收器 |
| 文件頁(yè)數(shù)： | 6/7頁(yè) |
| 文件大小： | 147K |
| 代理商： | MAX9159 |
M
Dual LVDS Line Receiver
6
_______________________________________________________________________________________
vated. If the inputs are open or if the inputs are undriven
and shorted or undriven and parallel terminated, there is
no input current. In this case, a pullup resistor in the fail-
safe circuit pulls both inputs above V
CC
- 0.3V, activating
the fail-safe circuit and forcing the output high.
Applications Information
Power-Supply Bypassing
Bypass V
CC
with high-frequency surface-mount ceram-
ic 0.1μF and 0.001μF capacitors in parallel as close to
the device as possible, with the smaller value capacitor
closest to the device.
Differential Traces
Input trace characteristics affect the performance of the
MAX9159. Use controlled-impedance PC board traces,
typically 100
. Match the termination resistor to this
characteristic impedance. Eliminate reflections and
ensure that noise couples as common mode by running
the differential traces close together. Reduce skew by
matching the electrical length of the traces. Excessive
skew can result in a degradation of magnetic field can-
cellation. Input differential signals should be routed
close to each other to cancel their external magnetic
field. Maintain a constant distance between the differ-
ential traces to avoid discontinuities in differential
impedance. Minimize the number of vias to further pre-
vent impedance discontinuities.
Cables and Connectors
Transmission media should typically have a controlled
differential impedance of 100
. Use cables and con-
nectors that have matched differential impedance to
minimize impedance discontinuities. Avoid the use of
unbalanced cables such as ribbon or simple coaxial
cable. Balanced cables such as twisted pair offer
superior signal quality and tend to generate less EMI
due to canceling effects. Balanced cables tend to pick
up noise as common mode, which is rejected by the
LVDS receiver.
Termination
In point-to-point connections, the MAX9159 requires an
external termination resistor. The termination resistor
should match the differential impedance of the transmis-
sion line. Termination resistance is typically 100
, but
may range between 90
to 132
, depending on the
characteristic impedance of the transmission medium.
When using the MAX9159, minimize the distance
between the input termination resistor and the
MAX9159 inputs. Use 1% surface-mount resistors.
Board Layout
For LVDS applications, use a four-layer PC board with
separate layers for power, ground, and input/output. To
minimize crosstalk, do not run the output in parallel with
the inputs.
Chip Information
TRANSISTOR COUNT: 461
PROCESS: CMOS
_A
_B
GND
_Y
MAX9159
V
CC
R
IN2
V
CC
- 0.3V
R
IN1
R
IN1
Figure 1. Input Fail-Safe Network
MAX9159
PULSE
GENERATOR
_Y
*50
REQUIRED FOR PULSE GENERATOR.
_A
_B
*50
*50
C
L
Figure 2. Propagation Delay and Transition-Time Test Circuit
20%
20%
1.4V
1.4V
80%
COMMON-MODE VOLTAGE: V
= (V
_A
+ V
) / 2
DIFFERENTIAL INPUT VOLTAGE: V
ID
= (V
_A
) - (V
_B
)
80%
V
OH
V
OL
t
R
t
F
V_
Y
V
ID
= 0
V
ID
= 0
V
ID
V
_B
V
_A
t
PLH
t
PHL
1.4V
1V
Figure 3. Propagation Delay and Transition-Time Waveforms
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PDF描述 |
|---|---|
| MAX9159ESA | Dual LVDS Line Receiver |
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| MAX9173ETE | Quad LVDS Line Receiver with Flow-Through Pinout and “In-Path” Fail-Safe |
| MAX9173EUE | Quad LVDS Line Receiver with Flow-Through Pinout and “In-Path” Fail-Safe |
| MAX9174ETB | 670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9159ESA | 制造商:Maxim Integrated Products 功能描述:DUAL LVDS LINE RECEIVER - Rail/Tube |
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| MAX915CPA | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Analog Comparator |
| MAX915CSA | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:VOLT COMPARATOR|SINGLE|BIPOLAR|SOP|8PIN|PLASTIC |
| MAX915EPA | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Analog Comparator |
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