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參數(shù)資料
| 型號(hào)： | MAX9125ESE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 11/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC QUAD LVDS LINE RCVR 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 接收器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 0/4 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
MAX9125/MAX9126
Fail-Safe
The fail-safe feature of the MAX9125/MAX9126 sets the
output high when:
Inputs are open.
Inputs are undriven and shorted.
Inputs are undriven and terminated.
A fail-safe circuit is important because under these
conditions, noise at the inputs may switch the receiver
and it may appear to the system that data is being
received. Open or undriven terminated input conditions
can occur when a cable is disconnected or cut, or
when the LVDS driver outputs are high impedance. A
short condition can occur because of a cable failure.
The fail-safe input network (Figure 1) samples the input
common-mode voltage and compares it to VCC - 0.3V
(nominal). When the input is driven to levels specified in
the LVDS standards, the input common-mode voltage
is less than VCC - 0.3V and the fail-safe circuit is not
activated. If the inputs are open or if the inputs are
undriven and shorted or undriven and parallel terminat-
ed, there is no input current. In this case, a pullup resis-
tor in the fail-safe circuit pulls both inputs above VCC -
0.3V, activating the fail-safe circuit and forcing the out-
put high.
Applications Information
Power-Supply Bypassing
Bypass the VCC pin with high-frequency surface-mount
ceramic 0.1F and 0.001F capacitors in parallel, as
close to the device as possible, with the smaller valued
capacitor closest to VCC.
Differential Traces
Input trace characteristics affect the performance of the
MAX9125/MAX9126. Use controlled-impedance PC
board traces to match the cable characteristic imped-
ance. The termination resistor is also matched to this
characteristic impedance.
Eliminate reflections and ensure that noise couples as
common mode by running the differential traces close
together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Each channel’s differential signals should be routed
close to each other to cancel their external magnetic
field. Maintain a constant distance between the differ-
ential traces to avoid discontinuities in differential
impedance. Avoid 90° turns and vias to further prevent
impedance discontinuities.
Cables and Connectors
Transmission media typically have a controlled differen-
tial impedance of 100
. Use cables and connectors
Quad LVDS Line Receivers with
Integrated Termination
8
_______________________________________________________________________________________
1.5V
EN WHEN EN = VCC
EN WHEN EN = GND
OUTPUT WHEN
VID = -100mV
OUTPUT WHEN
VID = +100mV
1.5V
0.5V
tPLZ
tPHZ
tPZL
tPZH
1.5V
3V
0
3V
VCC
VOL
VOH
GND
0
50%
Figure 5. High-Z Delay Waveforms
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| MAX9121EUE+T | IC RCVR QUAD LVDS 16-TSSOP |
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| MAX9124ESE+T | IC DRVR QUAD LVDS 16-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9125EUE | 制造商:Maxim Integrated Products 功能描述:QUAD LVDS LINE RECEIVER - Bulk |
| MAX9126 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Quad LVDS Line Receivers with Integrated Termination |
| MAX9126ESE | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9126ESE+ | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9126ESE+T | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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