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參數(shù)資料
| 型號(hào)： | MAX9111ESA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC RCVR SNGL LVDS 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 接收器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 0/1 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
_______________________________________________________________________________________
7
_______________Detailed Description
LVDS Inputs
The MAX9111/MAX9113 feature LVDS inputs for inter-
facing high-speed digital circuitry. The LVDS interface
standard is a signaling method intended for point-to-
point communication over a controlled impedance
media, as defined by the ANSI/EIA/TIA-644 standards.
The technology uses low-voltage signals to achieve fast
transition times, minimize power dissipation, and noise
immunity. Receivers such as the MAX9111/MAX9113
convert LVDS signals to CMOS/LVTTL signals at rates
in excess of 500Mbps. The devices are capable of
detecting differential signals as low as 100mV and as
high as 1V within a 0V to 2.4V input voltage range . The
LVDS standard specifies an input voltage range of 0 to
2.4V referenced to ground.
Fail-Safe
The fail-safe feature sets the output to a high state
when the inputs are undriven and open, terminated, or
shorted. When using one channel in the MAX9113,
leave the unused channel open. The fail-safe feature is
not guaranteed to be operational above +85°C.
ESD Protection
As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against electrostatic
discharges encountered during handling and assembly.
The receiver inputs of the MAX9111/MAX9113 have extra
protection against static electricity. Maxim’s engineers
have developed state-of-the-art structures to protect
these pins against ESD of ±11kV without damage. The
ESD structures withstand high ESD in all states: normal
operation, shutdown, and powered down.
ESD protection can be tested in various ways; the
receiver inputs of this product family are characterized
for protection to the limit of ±11kV using the Human
Body Model.
Human Body Model
Figure 3a shows the Human Body Model, and Figure
3b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5k
Ω resistor.
Pin Description
PIN
MAX9111
MAX9113
SOT23-8
SO-8
SOT23-8
SO-8
NAME
FUNCTION
1818
VCC
Power Supply
2525
GND
Ground
8181
IN-/IN1-
Receiver Inverting Differential Input
7272
IN+/IN1+
Receiver Noninverting Differential Input
—
5
4
IN2-
Receiver Inverting Differential Input
—
6
3
IN2+
Receiver Noninverting Differential Input
3737
OUT/OUT1
Receiver Output
—
4
6
OUT2
Receiver Output
4, 5, 6
3, 4, 6
—
N.C.
No Connection. Not internally connected.
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相關(guān)代理商/技術(shù)參數(shù) |
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| MAX9111-MAX9113 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 |
| MAX9112 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 |
| MAX9112EKA | 制造商:Maxim Integrated Products 功能描述:SINGLE/DUAL LVDS LINE DRIVER WITH ULTRA-LOW DIFFERENTIAL SKE - Cut Tape Product |
| MAX9112EKA/GH9-T | 制造商:Maxim Integrated Products 功能描述:SINGLE/DUAL LVDS LINE DRIVER WITH ULTRA-LOW DIFFERENTIAL SKE - Tape and Reel |
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