MAX811, MAX812
http://onsemi.com
4
APPLICATIONS INFORMATION
V
CC
Transient Rejection
The MAX811/12 provides accurate V
CC
monitoring and
reset timing during power–up, power–down, and
brownout/sag conditions, and rejects negative–going
transients (glitches) on the power supply line. Figure 1
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive that lays
under
the
curve will
not
generate a reset signal. Combinations above
the curve are detected as a brownout or power–down.
Transient immunity can be improved by adding a capacitor
in close proximity to the V
CC
pin of the MAX811/12.
Figure 1. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25
°
C
M
Reset Comparator Overdrive, [V
CCTP
–V
CC
](mV)
400
320
240
160
80
0
T
A
= +25
°
C
1
5
100
1000
MAX811/12
Duration
V
CC
V
TH
Overdrive
RESET Signal Integrity During Power–Down
The MAX811 RESET output is valid to V
CC
= 1.0 V.
Below this voltage the output becomes an “open circuit’’ and
does not sink current. This means CMOS logic inputs to the
μ
P will be floating at an undetermined voltage. Most digital
systems are completely shutdown well above this voltage.
However, in situations where RESET must be maintained
valid to V
CC
= 0 V, a pull–down resistor must be connected
from RESET to ground to discharge stray capacitances and
hold the output low (Figure 2). This resistor value, though
not critical, should be chosen such that it does not
appreciably load RESET under normal operation (100 k
will be suitable for most applications). Similarly, a pull–up
resistor to V
CC
is required for the MAX812 to ensure a valid
high RESET for V
CC
below 1.1 V.
Figure 2. Ensuring RESET Valid to V
CC
= 0 V
VCC
GND
VCC
MAX811
RESET
R1
100 K
Processors with Bidirectional I/O Pins
Some
μ
P’s (such as Motorola’s 68HC11) have
bi–directional reset pins. Depending on the current drive
capability of the processor pin, an indeterminate logic level
may result if there is a logic conflict. This can be avoided by
adding a 4.7 k
resistor in series with the output of the
MAX811/12 (Figure 3). If there are other components in the
system which require a reset signal, they should be buffered
so as not to load the reset line. If the other components are
required to follow the reset I/O of the
μ
P, the buffer should
be connected as shown with the solid line.
Figure 3. Interfacing to Bidirectional Reset I/O
GND
MAX811
VCC
RESET
VCC
RESET
GND
VCC
BUFFER
4.7 K
P
BUFFERED
RESET TO
OTHER
SYSTEM
COMPONENTS