參數(shù)資料
型號(hào): MAX807MCUE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: Full-Featured uP Supervisory Circuit with +/-1.5% Reset Accuracy
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO16
封裝: TSSOP-16
文件頁數(shù): 12/16頁
文件大?。?/td> 196K
代理商: MAX807MCUE
M
Power-Fail Comparator
PFI is the noninverting input to an uncommitted com-
parator. If PFI is less than V
PFT
(2.265V), PFO goes low.
The power-fail comparator is intended to monitor the
preregulated input of the power supply, providing an
early power-fail warning so software can conduct an
orderly shutdown. It can also be used to monitor sup-
plies other than 5V. Set the power-fail threshold with a
resistor-divider, as shown in Figure 10.
Power-Fail Input
PFI is the input to the power-fail comparator. The typical
comparator delay is 14μs from V
IL
to V
OL
(power failing),
and 32μs from V
IH
to V
OH
(power being restored). If
unused, connect this input to ground.
Power-Fail Output
The Power-Fail Output (PFO) goes low when PFI goes
below V
PFT
. It typically sinks 3.2mA with a saturation
voltage of 0.1V. With PFI above V
PFT
, PFO is actively
pulled to V
CC
. Connecting PFI through a voltage-
divider to a preregulated supply allows PFO to gener-
ate an NMI as the preregulated power begins to fall
(Figure 11b). If the preregulated supply is inaccessible,
use LOW LINE to generate the NMI (Figure 11a). The
LOW LINE threshold is typically 52mV above the reset
threshold (see the
Low-Line Comparator
section).
Full-Featured μP Supervisory Circuit with
±1.5% Reset Accuracy
12
______________________________________________________________________________________
MAX807
V
CC
GND
PFI
PFO
R1
R2
V
IN
0V
V
IN
PFO
V
TRIP
V
L
V
PFT
= 2.265V
V
PFH
= 20mV
WHERE
V
TRIP
= R2
+
R1
1
)
(
R2
1
R1
V
CC
(V
PFT
+ V
PFH
)
V
L
= R2
+
R1
1
)
(
R2
1
R1
V
CC
(V
PFT
)
NOTE: V
TRIP,
V
L
ARE NEGATIVE.
V
CC
MAX807
V
CC
GND
PFI
PFO
R1
R2
PFO
V
TRIP
V
H
V
IN
V
TRIP
=
)
(
R2
R1
+
R2
V
PFT
V
H
=
(V
PFT
+
V
PFH
)
V
CC
V
IN
MR
b)
a)
)
(
R2
R1
+
R2
MAX807
OUT
V
CC
FROM
REGULATED
SUPPLY
POWER TO
CMOS RAM
BATT
RESET
LOW LINE
WDI
GND
RESET
NMI
I/O LINE
μ
P
μ
P POWER
0.1
μ
F
0.1
μ
F
2.8V
a)
b)
MAX807
OUT
V
CC
PFI
POWER TO
CMOS RAM
BATT
RESET
PFO
WDI
GND
VOLTAGE
REGULATOR
RESET
NMI
I/O LINE
μ
P
μ
P POWER
0.1
μ
F
0.1
μ
F
2.8V
Figure 10. Using the Power-Fail Comparator to Monitor an Additional Power Supply: a) V
IN
is Negative, b) V
IN
is Positive
Figure 11. a) If the preregulated supply is inaccessible, LOW
LINE generates the NMI for the μP. b) Use PFO to generate the
μP NMI if the preregulated supply is accessible.
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