參數(shù)資料
型號: MAX781CBX
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: PDA/Hand-Held Computer Power Controller
中文描述: 0.1 A SWITCHING CONTROLLER, 340 kHz SWITCHING FREQ-MAX, PDSO36
封裝: PLASTIC, SSOP-36
文件頁數(shù): 11/24頁
文件大?。?/td> 185K
代理商: MAX781CBX
M
PDA/Hand-Held Computer Power Controller
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11
nal, causing the battery pack to need at least three ter-
minals: BATT+, BATT,- and THERM. The MAX781’s
TEMP pin connects to the battery pack’s thermistor
(Figure 6). Without the battery pack installed, R8 pulls
the MAX781’s TEMP pin up to 3OUT, and BATTSTAT =
1. When the battery pack is inserted, the resistive
divider formed by the thermistor and R8 pulls the TEMP
pin below 3OUT, forcing BATTSTAT = 0. Any transition
of BATTSTAT sets BATTINT. Clear BATTINT by writting
a logic 1 in bit 31 of the serial-configuration data. The
BATTSTAT comparator is disabled in low-power and
shutdown modes, and outputs a logic zero regardless
of the state of its inputs.
3VINT and 3VSTAT indicate the status of the 3OUT
output (+3.3V ±4%). 3OUT is out of regulation when
its output voltage falls below +3.1V. 3VSTAT = 0 when
3OUT is in regulation, and 3VSTAT = 1 when 3OUT is
out of regulation. A rising edge on 3VSTAT sets
3VINT; thus, 3OUT going out of regulation sets 3VINT.
Table 3. Configuration Data-Bit Assignments
MODE0
VPPB1
VPPB0
VPPA1
VPPA0
CHARGE
IDLE
MODE1
1
0
0
0
0
1
1
1
Operating mode select bit, 0, see Table 2
VPPB voltage select bit 1, see Table 5
VPPB voltage select bit 0, see Table 5
VPPA voltage select bit 1, see Table 5
VPPA voltage select bit 0, see Table 5
W
W
W
W
W
4
3
2
1
0
1 = DCHG switching current source on, 0 = off
1 = Idle regulation, 0 = PWM regulation
Operating mode select bit, 1, see Table 2
W
W
W
7
6
5
CHG2
CHG1
CHG0
50N
FASTON
CHG6
CHG5
CHG4
CHG3
MUX0
MUX1
0
1
0
1
0
0
0
0
0
0
1
Charger current setting DAC bit 2
Charger current setting DAC bit 1
Charger current setting DAC bit 0
1 = 5OUT linear regulator on, 0 = off
1 = FAST sinks current, 0 = FAST open drain
W
W
W
W
W
12
11
10
9
8
Charger current setting DAC bit 6
Charger current setting DAC bit 5
Charger current setting DAC bit 4
Charger current setting DAC bit 3
W
W
W
W
16
15
14
13
Analog multiplexer bit 0
W
17
Analog multiplexer bit 1
W
18
GDSEL4
GDSEL3
GDSEL2
GDSEL1
MUX2
CHGINT
CHGSTAT
GDSEL5
3VSTAT
3VINT
BATTSTAT
BATTINT
NAME
0
0
0
1
0
0
0
0
0
0
0
0
*
1 = GD4 sources from VHI, 0 = GD4 sinks to AGND
1 = GD3 sources from VHI, 0 = GD3 sinks to AGND
1 = GD2 sources from VHI, 0 = GD2 sinks to AGND
1 = GD1 sources from VHI, 0 = GD1 sinks to AGND
Analog multiplexer bit 2
W
W
W
W
W
23
22
21
20
19
1 = VCHG > BATT detected
1 = VCHG > BATT, 0 = VCHG < BATT
Unused
1 = GD5 sources from VHI, 0 = GD5 sinks to AGND
R/W
R
27
26
25
24
W
1 = 3OUT out of regulation, 0 = in regulation
R
28
1 = 3OUT fault detected
R/W
29
BIT
1 = TEMP > 0.82*3OUT, 0 = TEMP < 0.82*3OUT
R
30
1 = TEMP pin voltage crossed 0.82* 3OUT
R/W
31
DESCRIPTION
R/W
* = Power-on reset default state
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