R7 can be as large as 0.082
x 1.01 = 0.0828
, yield-
ing a minimum peak current limit of 80mV / 0.0828
=
0.966A.
Use the spreadsheet in Listings 1 and 2 to calculate the
power available at 3OUT as a function of the current-
sense resistor choice.
Listing 1. Spreadsheet for Calculating 3OUT
Current Capability
Parameter
(Cell A1)
Current-Limit Threshold
Current Sense R7
Current Limit
Switching Frequency
Switching Period
T1 Primary Inductance
3OUT Regulation Point
BATT Input Range
(Cell A10)
Current Limit
Switching Period
T1 Primary Inductance
3OUT
BATT
VHI Load Current
T1 Turns Ratio
T1 Coupling Loss
(Cell A20)
T1 Ripple Current
T1 Continuous Current
3OUT Current, No VHI load
VHI Load Power
3OUT Guaranteed Current
(Cell A26)
Min
Max
Units
(Cell B1) (Cell C1)
80
81
0.964
270
2.941
16
3.170
5.000
120
83
1.481
340
3.704
24
3.430
17.500
mV
m
A
kHz
μs
μH
V
V
0.964
A
μs
μH
3.704
16
3.430
17.500
60
3.5
80
mA
%
0.638
0.325
0.645
0.926
0.307
(Cell C26)
A
A
A
W
A
(Cell B26)
Listing 2. Calculating 3OUT Current-Capability
Formulas
B4: +B2/C3
C4: +C2/B3
B6: 1/C5*1000
C6: 1/B5*1000
B12: +B4
C13: +C6
B14: +B7
C15: +C8
C16: +C9
C21: @MIN(+C15/C16*C13*(C16-C15)/B14,B12)
C22: +B12-C21
C23: @IF(C22=0,0.5*(B14/1000000)*C21^2*1000000/
C13/C15,C22+C21/2)
C24: +C15*(C18+1)*C17/1000
C25: +C23-C24/(C19/100)/C15
R7 must have as little series inductance as possible
and be as physically small as possible. 3OUT and CS3
need to Kelvin sense R7. A pair of traces running in
parallel should leave 3OUT and CS3 and diverge only
when they meet R7. Minimize the distance between
R7 and the positive terminal of C6.
Power MOSFETs
M1 and M2 must be logic level, low r
DS(ON)
, N-channel
power MOSFETs. M1’s drain should be as close as
possible to C15’s positive terminal and M2’s source
should be as close as possible to C15’s ground con-
nection point.
Transformer T1
T1’s primary inductance must be between 10μH and
100μH. The peak current allowed through the primary
with the secondary open circuited must be greater than
the worst-case peak current set by R7. T1’s turns ratio
(number of turns on secondary / number of turns on pri-
mary) should be 3.5. If VHI rises up to 20V when 3OUT
is loaded in operate mode, T1 may have too much
interwinding capacitance. Minimize interwinding
capacitance to prevent energy waste in the VHI clamp
(which clamps VHI to 19V to protect the MAX781).
__________Applic ations Information
Design Example
Table 7 shows the targets for a typical design require-
ment. Since both PCMCIA slots will not be pro-
grammed at the same time, VPPA and VPPB will never
be at +12V at the same time; thus the worst case for
power consumption is when both 3.3V and VPPA or
VPPB is fully loaded.
Total power consumption = (max 3OUT voltage) x (max
3OUT load current) + (VHI voltage) x (max VPP or load
current) / (transformer efficiency).
M
PDA/Hand-Held Computer Power Controller
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