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參數(shù)資料
| 型號(hào)： | MAX769EEI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | 2 or 3-Cell, Step-Up/Down, Two-Way Pager System IC |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO28 |
| 封裝： | 0.150 INCH, 0.025 INCH PITCH, QSOP-28 |
| 文件頁(yè)數(shù)： | 15/16頁(yè) |
| 文件大?。?/td> | 161K |
| 代理商： | MAX769EEI |
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M
2 or 3-Cell, S tep-Up/Down,
Two-Way Pager S ystem IC
______________________________________________________________________________________
15
Applic ations Information
Component S elec tion
The MAX769 requires minimal design calculation and is
optimized for the component values shown in Figure 2.
However, some flexibility in component selection is still
allowed, as described in the following text. A list of suit-
able components is provided in Table 6.
Inductor L1 is nominally 68μH, but values from 47μH to
100μH should be satisfactory. The inductor current rat-
ing should be 300mA or more if full output current
(80mA) is needed. If less output current is required, the
inductor current rating can be reduced proportionally
but should never be less than 150mA.
Inductor resistance should be minimized for best effi-
ciency, but since the MAX769 N-channel switch resis-
tance is typically 0.9
, efficiency does not improve
significantly for coil resistances below 0.4
.
Filter capacitors C1–C4 should be low-ESR types (tan-
talum or ceramic) for lowest ripple and best noise
rejection. The values shown in Figure 2 are optimized
for each output’s rated current. Lower required output
current allows smaller capacitance values.
Resistors at the LBI and RSIN inputs set the voltage at
which the LBO and RSO outputs trigger. The voltage
threshold for both LBI and RSI is 0.6V. The resistors
required to set a desired trip voltage, (Figure 2) V
TRIP
,
are calculated by:
R1 = R2[(V
TRIP(LBO)
/ 0.6) - 1]
R3 = R4[(V
TRIP(LBO)
/ 0.6) - 1]
To minimize battery drain, use large values for R2 and
R4 (>100k
) in the above equations; 470k
is a good
starting value.
See the Low-Noise Analog Supply (REG2) section for
information on selecting R
OFS
.
Since LBO and RSO are open-drain outputs, pull-up
resistors are usually required. Normally these will be
pulled up to REG1. 100k
is recommended as a com-
promise between response time and current drain,
although other values can be used. Since LBI and RSO
are high (open circuit) during normal operation, current
normally does not flow in the pull-up resistors until a
low-battery or reset event occurs.
Logic Levels
Note that since the MAX769’s internal logic is powered
from REG1, the input logic levels at the digital inputs
(DR2IN, RUN, SYNC,
CS
, and SDI) as well as the logic
output level of SDO are governed by the voltage at
REG1. Logic-high inputs at these pins should not
exceed V
REG1
. Digital inputs should either be driven
from external logic (or a μP) powered from REG1, or by
open-drain logic devices that are pulled up to REG1.
Board Layout and Noise Reduc tion
The MAX769 makes every effort in its internal design to
minimize noise and EMI. Nevertheless, prudent layout
practices are still suggested for best performance.
Recommendations are as follows:
1) Keep trace lengths at L1, LX1, and LX2, as well as
at PGND, as short and wide as possible. Since LX1
and LX2 toggle between V
BATT
and V
OUT
at a fast
rate, minimizing the trace length serves to reduce
excess PC board area that might act as an antenna.
2) Place the filter capacitors at OUT, REG1, REG2,
and REG3 as close to their respective pins as pos-
sible (no more than 0.5mm away).
3) Consider using an inductor at L1. A shielded induc-
tor at L1 will minimize radiated noise, but may not
be essential. Toroids will also exhibit EMI perfor-
mance similar to that of shielded coils.
4) Keep the power components at the uppermost part
of the IC to minimize coupling to other parts of the
circuit. The LX1, LX2, OUT, and PGND pins are
located at the uppermost part of the IC to facilitate
PC board layout. Other pins in this area are digital
and are not affected by close proximity to switching
nodes.
5) Use a separate short, wide ground trace for PGND
and the ground side of the BATT and OUT filter
capacitors. Tie this trace to the ground plane.
Table 6. External Components
SUPPLIER
PART NO.
INDUCTORS (68μH)
COMMENTS
CD54-680
LQH4N680K
1.9
, 2.6mm high,
low current, low cost
0.46
, 4.5mm high
0.33
, 4.5mm high,
shielded
0.33
, 3.5mm high
Murata
Sumida
CDR74B-680
Coilcraft
DT1608C-223,
DT1608C-683
0.58
, 3.18mm high,
shielded
AVX
Marcon
Sprague
TDK
STORAGE CAPACITOR (optional at NICD pin)
TPS series
THCR series
595D series
C3216 series
Tantalum
Ceramic
Tantalum
Ceramic
CD73-680
Polystor
A-10300
1.5 Farads
CAPACITORS
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX769EEI+ | 功能描述:PMIC 解決方案 2-3 Cell Step-Up/Dwn 2-Way Pgr System IC RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| MAX769EEI+T | 功能描述:PMIC 解決方案 2-3 Cell Step-Up/Dwn 2-Way Pgr System IC RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| MAX769EEI-T | 功能描述:PMIC 解決方案 2-3 Cell Step-Up/Dwn 2-Way Pgr System IC RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| MAX769EVKIT | 功能描述:電源管理IC開(kāi)發(fā)工具 Evaluation Kit for the MAX769 RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| MAX7705CPA | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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