參數(shù)資料
型號: MAX6816EUS+T
廠商: Maxim Integrated Products
文件頁數(shù): 4/8頁
文件大?。?/td> 0K
描述: IC DEBOUNCER SWITCH SGL SOT143-4
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: *
應(yīng)用: *
接口: *
電源電壓: *
封裝/外殼: TO-253-4,TO-253AA
供應(yīng)商設(shè)備封裝: SOT-143-4
包裝: 標(biāo)準(zhǔn)包裝
安裝類型: 表面貼裝
產(chǎn)品目錄頁面: 1423 (CN2011-ZH PDF)
其它名稱: MAX6816EUS+TDKR
_______________Detailed Description
Theory of Operation
The MAX6816/MAX6817/MAX6818 are designed to
eliminate the extraneous level changes that result from
interfacing with mechanical switches (switch bounce).
Virtually all mechanical switches bounce upon opening
or closing. These switch debouncers remove bounce
when a switch opens or closes by requiring that
sequentially clocked inputs remain in the same state for
a number of sampling periods. The output does not
change until the input is stable for a duration of 40ms.
The circuit block diagram (Figure 1) shows the func-
tional blocks consisting of an on-chip oscillator,
counter, exclusive-NOR gate, and D flip-flop. When the
input does not equal the output, the XNOR gate issues
a counter reset. When the switch input state is stable
for the full qualification period, the counter clocks the
flip-flop, updating the output. Figure 2 shows the typical
opening and closing switch debounce operation. On
the MAX6818, the change output (CH) is updated
simultaneously with the switch outputs.
Undervoltage Lockout
The undervoltage lockout circuitry ensures that the out-
puts are at the correct state on power-up. While the sup-
ply voltage is below the undervoltage threshold
(typically 1.9V), the debounce circuitry remains trans-
parent. Switch states are present at the logic outputs
with no debouce delay.
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
PIN
2
1, 3
12–19
4, 6
3
2–9
11
1
4
5
20
Pin Description
FUNCTION
Switch Input
Switch Inputs
CMOS Debounced Outputs
CMOS Debounced Output
Switch Inputs
Change-of-State Output. Goes low on switch input change of
state. Resets on EN. Leave unconnected if not used.
Active-Low, Three-State Enable Input for outputs. Resets CH.
Tie to GND to “always enable” outputs.
+2.7V to +5.5V Supply Voltage
NAME
IN
IN1, IN2
OUT8–OUT1
OUT2, OUT1
OUT
IN1–IN8
CH
EN
VCC
VCC
RPU
DQ
R
Q
D
COUNTER
LOAD
OUT
IN
ESD
PROTECTION
UNDER-
VOLTAGE
LOCKOUT
OSC.
MAX6816
MAX6817
MAX6818
Figure 1. Block Diagram
1
2
10
Ground
GND
MAX6816
MAX6817
MAX6818
4
Maxim Integrated
MAX6816/MAX6817/MAX6818
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