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參數(shù)資料
| 型號： | MAX6748KA |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | UP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay |
| 中文描述： | 復(fù)位電路的電容可調(diào)的復(fù)位/看門狗超時周期 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大小： | 187K |
| 代理商： | MAX6748KA |
Watchdog Timer
MAX6746–MAX6751
The watchdog
’
s circuit monitors the μP
’
s activity. It the
μP does not toggle the watchdog input (WDI) within
t
WD
(user-selected),
RESET
asserts for the reset time-
out period. The internal watchdog timer is cleared by
any event that asserts
RESET
, by a falling transition at
WDI (which can detect pulses as short as 300ns) or by
a transition at WDS. The watchdog timer remains
cleared while reset is asserted; as soon as reset is
released, the timer starts counting.
The MAX6746
–
MAX6751 feature two modes of watch-
dog operation: normal mode and extended mode. In nor-
mal mode (
Figure
4a), the watchdog timeout period is
determined by the value of the capacitor connected
between SWT and ground. In extended mode (
Figure
4b), the watchdog timeout period is multiplied by 128.
For example, in extended mode, a 0.1μF capacitor gives
a watchdog timeout period of 65s (see the Extended-
Mode Watchdog Timeout Period vs. C
SWT
graph in the
Typical Operating Characteristics
). To disable the watch-
dog timer function, connect SWT to ground.
MAX6752/MAX6753
The MAX6752 and MAX6753 have a windowed watch-
dog timer that asserts
RESET
for the adjusted reset
timeout period when the watchdog recognizes a fast
watchdog fault (t
WDI
< t
WD1
), or a slow watchdog fault
(period > t
WD2
). The reset timeout period is adjusted
independently of the watchdog timeout period.
The slow watchdog period, t
WD2
is calculated as follows:
t
WD2
= 0.65 x 10
9
x C
SWT
with t
WD2
in seconds and C
SWT
in Farads.
The fast watchdog period, t
WD1
, is selectable as a ratio
from the slow watchdog fault period (t
WD2
). Select the
fast watchdog period by pinstrapping SET0 and SET1,
where HIGH is V
CC
and LOW is GND.
Table
1 illus-
trates the SET0 and SET1 configuration for the 8, 16,
and 64 window ratio ( t
WD2
/t
WD1
).
For example, if C
SWT
is 1500pF, and SET0 and SET1 are
low, then t
WD2
is 975ms (typ) and t
WD1
is 122ms (typ).
RESET
asserts if the watchdog input has two falling
edges too close to each other (faster than t
WD1
) (
Figure
5a) or falling edges that are too far apart (slower than
t
WD2
) (
Figure
5b). Normal watchdog operation is dis-
played in (
Figure
5c). The internal watchdog timer is
cleared when a WDI falling edge is detected within the
valid watchdog window or when
RESET
is deasserted.
All WDI inputs are ignored while
RESET
is asserted.
The watchdog timer begins to count after
RESET
is
deasserted. The watchdog timer clears and begins to
count after a valid WDI falling logic input. WDI falling
transitions within periods shorter than t
WD1
or longer
than t
WD2
force
RESET
to assert low for the reset time-
out period. WDI falling transitions within the t
WD1
and
t
WD2
window do not assert
RESET
. WDI transitions
between t
WD1(min)
and t
WD1(max)
or t
WD2(min)
and
t
WD2(max)
are not guaranteed to assert or deassert the
RESET
. To guarantee that the window watchdog does
not assert the
RESET
, strobe WDI between t
WD1(max)
and t
WD2(min)
. The watchdog timer is cleared when
RESET
is asserted or after a falling transition on WDI or
after a state change on SET0 or SET1. Disable the
watchdog timer by connecting SET0 high and SET1 low.
M
μP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
_______________________________________________________________________________________
9
t
WD
x 128
t
RP
V
CC
WDI
RESET
EXTENDED MODE (WDS = V
CC
)
V
CC
OV
OV
Figure 4b. Watchdog Timing Diagram, WDS = V
CC
SET0
LOW
LOW
HIGH
HIGH
SET1
LOW
HIGH
LOW
HIGH
RATIO
8
16
Watchdog Disabled
64
Table 1. Min/MAX Watchdog Setting
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX6748KA+ | 制造商:Maxim Integrated Products 功能描述:PROCESSOR SUPERVISOR 4.2UA 8PIN SOT-23 - Rail/Tube |
| MAX6748KA+T | 功能描述:監(jiān)控電路 Single uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6748KA-T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6749KA | 制造商:Maxim Integrated Products 功能描述:SINGLE/DUAL-VOLT MICROPROC. RESET CIRCUITS W/ - Cut Tape Product |
| MAX6749KA+ | 制造商:Maxim Integrated Products 功能描述:PROCESSOR SUPERVISOR 4.2UA 8PIN SOT-23 - Rail/Tube |
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