參數(shù)資料
型號: MAX6391KA46
廠商: Maxim Integrated Products, Inc.
英文描述: Dual-Voltage uP Supervisory Circuits with Sequenced Reset Outputs
中文描述: 雙電壓監(jiān)控電路的連續(xù)復(fù)位輸出
文件頁數(shù): 3/9頁
文件大?。?/td> 170K
代理商: MAX6391KA46
M
Dual-Voltage μP Supervisory Circuits
with Sequenced Reset Outputs
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 1.2V to 5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise specified. Typical values are at V
CC
= +5V and T
A
= +25
°
C.) (Note 1)
PARAMETER
SYMBOL
t
RP1
CONDITIONS
MIN
140
2.2
TYP
200
3.1
MAX
280
4.0
UNITS
ms
RESET1
Timeout Period
C
CSRT
= 1500pF
C
CSRT
= V
CC
RESET2
Timeout Period (Note 3)
t
RP2
140
200
280
ms
V
CC
1.0V,
T
A
= 0
°
C to +85
°
C
0.3
I
SINK
= 50μA,
reset asserted
V
CC
1.2V,
T
A
= -40
°
C to +85
°
C
0.3
I
SINK
= 1.2mA, reset asserted, V
CC
2.5V
I
SINK
= 3.2mA, reset asserted, V
CC
4.25V
V
CC
V
TH1
, V
RESET IN2
V
TH2
,
reset not asserted
0.3
0.4
RESET_
Output Voltage Low
V
OL
V
Open-Drain
RESET
Output
Leakage Current
I
LKG
1.0
μA
V
CC
2.25V, I
SOURCE
= 500μA,
reset not asserted
Push-Pull
RESET1
Output
Voltage High (MAX6392 only)
V
OH
V
CC
4.5V, I
SOURCE
= 800μA, reset not
asserted
0.8
V
CC
V
V
IL
V
IH
0.8
V
CC
> 4.0V
2.4
V
IL
0.3
V
CC
MR
Input
V
IH
V
CC
< 4.0V
0.7
V
CC
50
V
MR
Minimum Pulse Width
MR
Glitch Rejection
MR
to
RESET1
Delay
MR
to
RESET2
Delay
t
MR
Skew
MR
Pullup Resistance
Reset Pullup Resistance
μs
ns
μs
ns
μs
k
k
100
10
100
10
47
47
t
MR1
t
MR2
t
MR1
- t
MR2
Pullup to V
CC
RESET1
to R1 or
RESET2
to R2
35
35
60
60
Note 1:
Overtemperature limits are guaranteed by design and not production tested. Devices tested at +25
°
C only.
Note 2:
RESET2
asserts before
RESET1
when V
CC
goes below the threshold for all supply voltage and temperature ranges.
Note 3:
CSRT must be connected to either V
CC
(for fixed
RESET2
timeout period) or an external capacitor (for user-
adjustable
RESET2
timeout period).
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