MAX5986AMAX5986C/MAX5987A
IEEE 802.3af-Compliant, High-Efficiency, Class 1/
Class 2, PDs with Integrated DC-DC Converter
14
Maxim Integrated
Sleep and Ultra-Low Power Modes
(MAX5986AMAX5986C)
The MAX5986AMAX5986C feature a sleep mode and
an ultra-low power mode in which the internal p-channel
isolation MOSFET is kept on and the buck regulator is off.
In sleep mode, the LED driver output (LED) pulse width
modulates the LED current with a 25% duty cycle. The
peak LED current (I
LED
) is set by an external resistor R
SL
. To enable sleep mode, apply a falling edge to SL with
ULP disconnected or high impedance. Sleep mode can
only be entered from wake mode.
Ultra-low power mode allows the devices to reduce
power consumption lower than sleep mode, while main-
taining the power signature of the IEEE standard. The
ultra-low power-mode enable input ULP is internally held
high with a 50k?pullup resistor to the internal 5V bias of
the device. To enable ultra-low power mode, apply a fall-
ing edge to SL with ULP = LOW. Ultra-low power mode
can only be entered from wake mode.
To exit from sleep mode or ultra-low power mode and
resume normal operation, apply a falling edge on the
wake-mode enable input (WK).
Thermal-Shutdown Protection
If the devices die temperature reaches 143癈, an over-
temperature fault is generated and the device shuts
down. The die temperature must cool down below
+127癈 to remove the overtemperature fault condition.
After a thermal shutdown condition clears, the device is
reset.
WAD Description
For applications where an auxiliary power source such
as a wall power adapter is used to power the PD, the
devices feature wall power adapter detection.
The wall power adapter is connected from WAD to PGND.
The devices detect the wall power adapter when the volt-
age from WAD to PGND is greater than 8.8V. When a wall
power adapter is detected, the internal isolation MOSFET
is turned off, classification current is disabled.
Connect the auxiliar power source to WAD, connect a
diode from WAD to V
DD
, and connect a diode from WAD
to V
CC
. See the typical application circuit in Figure 2.
The application circuit must ensure that the auxiliary
power source can provide power to V
DD
and V
CC
by
means of external diodes. The voltage on V
DD
must be
within the V
DD
voltage range to allow the DC-DC to oper-
ate. To allow operation of the DC-DC converter, the V
DD
and V
CC
voltage must be greater than 8.7V, on the rising
edge, while on the falling edge the V
DD
and V
CC
may fall
down to 7.3V keeping the DC-DC converter on.
Note: When operating solely with a wall power adapter,
the WAD voltage must be able to meet the condition V
DD
> 8.7V, that likely results in WAD > 9.4V.
Internal Linear Regulator and Back Bias
An internal voltage regulator provides VDRV to internal
circuitry. The VDRV output is filtered by a 1礔 capaci-
tor connected from VDRV to GND. The regulator is for
internal use only and cannot be used to provide power to
external circuits. VDRV can be powered by either V
DD
or
V
AUX
, depending on V
AUX
. The internal regulator is used
for both PD and buck converter operations.
V
OUT
can be used to back bias the VDRV voltage regu-
lator if V
OUT
is greater than 4.75V. Back biasing VDRV
increases device efficiency by drawing current from
V
OUT
instead of V
DD
. If V
OUT
is used as back bias,
connect AUX directly to V
OUT
. In this configuration, the
V
DRV
source switches from V
DD
to V
AUX
after the buck
converters output has reached its regulation voltage.
Cable Discharge Event Protection (CDE)
A 70V voltage clamp is integrated to protect the internal
circuits from a cable discharge event.
DC-DC Buck Converter
The DC-DC buck converter uses a PWM, peak current-
mode, fixed-frequency control scheme providing an
easy-to-implement architecture without sacrificing a fast
transient response. The buck converter operates in a
wide input voltage range from 8.7V to 60V and sup-
ports up to 3.84W (MAX5986A) or 6.49W (MAX5986B/
MAX5986C/MAX5987A) of input power. The devices pro-
vide a wide array of protection features including UVLO,
overtemperature shutdown, short-circuit protection with
hiccup runaway current limit, cycle-by-cycle peak cur-
rent protection, and cycle-by-cycle output overvoltage
protection, for enhanced performance and reliability. A
frequency foldback scheme is implemented to reduce
the switching frequency to half at light loads to increase
the efficiency.