參數資料
型號: MAX5961ETM+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: 0 to 16V, Quad, Hot-Swap Controller with 10-Bit Current and Voltage Monitor; Package: THIN QFN, 48 pin ; Temperature Range: -40°C to +85°C
中文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, QCC48
封裝: 7 X 7 MM, ROHS COMPLIANT, MO-220, TQFN-48
文件頁數: 29/42頁
文件大?。?/td> 335K
代理商: MAX5961ETM+
MAX5961
0 to 16V, Quad, Hot-Swap Controller
with 10-Bit Current and Voltage Monitor
______________________________________________________________________________________
35
If the circular buffer contents are retrieved as 10-bit
data, the first byte read-out is the high-order 8 bits of
the 10-bit sample, and the second byte read-out con-
tains the two least-significant bits (LSBs) of the sample.
This is repeated for each of the 50 samples in the
buffer. Thus, 2 bytes must be read for each 10-bit sam-
ple retrieved. Conversely, if the buffer contents are
retrieved as 8-bit data, then each byte read-out con-
tains the 8 MSB of each successive sample. It is impor-
tant to remember that in 10-bit mode, 100 bytes must
be read to extract the entire buffer contents, but in 8-bit
mode, only 50 bytes must be read.
The circular buffer system has a user-programmable
“stop delay” that specifies a certain number of sample
cycles to continue recording to the buffer after a shut-
down occurs. This delay value is stored in register
cbuf_dly_stop[5:0] (see Table 44).
The default (reset) value of the buffer stop-delay is 25
samples, which means that an equal number of sam-
ples are stored in the buffer preceding and following
the moment of the shutdown event. The buffer stop
delay is analogous to an oscilloscope trigger delay,
because it allows the MAX5961 to record what hap-
pened both immediately before and after a shutdown.
In other words, when the contents of a circular buffer
are read-out of the MAX5961, the shutdown event will
by default be located in the middle of the recorded
data. The balance of data before and after an event
can be altered by writing a different value (between 0
and 50) to the buffer stop-delay register.
Autoretry or Latched-Off
Fault Management
In the event of an overcurrent, undervoltage, or overvolt-
age condition that results in the shutdown of one or more
channels, the MAX5961 device can be configured to
either latch off or automatically restart the affected chan-
nel. The MAX5961 stays off if the RETRY input is set low
(latched-off), and will autoretry if the RETRY input is high.
The RETRY input is read once during initialization and sets
the value of bit 6 of the status3 register (see Table 30).
The autoretry feature has a fixed 200ms timeout delay
between fault shutdown and the autorestart attempt. Be
aware that if the MAX5961 is configured for autoretry
operation, the startup event will occur every 200ms if a
short circuit occurs. A short circuit during startup caus-
es the output current to increase rapidly as the MOS-
FET is enhanced, until the slow-trip threshold is
reached and the gate is pulled low again. Be sure to
evaluate the MOSFET junction temperature rise for this
repeated-stress condition if autoretry is used.
To restart a channel that has been shut down in latched-
off operation (RETRY low), the user must either cycle
power to the IN pin, or toggle one or more of the ON_
input, Chx_EN1 bit, or the Chx_EN2 bit for the affected
channel.
Force-On Function
When the force-on bit for a channel is set to 1 in regis-
ter foset[3:0] (see Table 45), the channel is enabled
regardless of the ON_ pin voltage or the Chx_EN1 and
Chx_EN2 bits in register chxen. In forced-on operation,
all functions operate normally with the notable excep-
tion that the channel will not shut down due to any fault
conditions that may arise.
There is a force-on key register, fokey, that must be set
to 0xA5 for the force-on function to become active (see
Table 46). If this register contains any value other than
0xA5, writing 1 to the force-on bits in register
foset will
have no effect. This provides protection against acci-
dental force-on operation that might otherwise be
caused by an erroneous I2C write.
Table 44. Circular Buffer Stop-Delay Register Format
Description:
Circular buffer stop-delay: any integer number between 0 and 50 samples that are to be recorded to
a buffer after a shutdown event, before the buffer stops storing new data.
Register Title:
cbuf_dly_stop
Register Address:
0x72
R
R/W
RESET
VALUE
00
0x19
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
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