參數(shù)資料
型號(hào): MAX5873
廠商: Maxim Integrated Products, Inc.
英文描述: Quadruple Line Driver 14-CDIP -55 to 125
中文描述: 12位、200Msps、高動(dòng)態(tài)性能、雙路DAC,CMOS輸入
文件頁(yè)數(shù): 5/18頁(yè)
文件大?。?/td> 511K
代理商: MAX5873
M
16-Bit, 250Msps, High-Dynamic-Performance,
Dual DAC with LVDS Inputs
_______________________________________________________________________________________
5
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD3.3
= DV
DD3.3
= AV
CLK
= +3.3V, AV
DD1.8
= DV
DD1.8
= +1.8V, GND = 0, f
CLK
= 2 x f
DAC
, external reference V
REFIO
= +1.25V, out-
put load 50
double-terminated, transformer-coupled output, I
OUTFS
= 20mA, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 2)
Note 2:
Specifications at T
A
+25°C are guaranteed by production testing. Specifications at T
A
< +25°C are guaranteed by design.
Note 3:
Nominal full-scale current I
OUTFS
= 32 x I
REF
.
Note 4:
This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5878.
Note 5:
Parameter measured single-ended into a 50
termination resistor.
Note 6:
Not production tested. Guaranteed by design.
Note 7:
No termination resistance between XORP and XORN.
Note 8:
A differential clock input slew rate of >100V/μs is required to achieve the specified dynamic performance.
Note 9:
Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
PARAMETER
SYMBOL
SR
CLK
CONDITIONS
MIN
TYP
>100
MAX
UNITS
V/μs
Differential Input Slew Rate
(Note 8)
External Common-Mode Voltage
Range
V
COM
AV
CLK
/ 2
±
0.3
5
2.5
V
Input Resistance
Input Capacitance
POWER SUPPLIES
R
CLK
C
CLK
k
pF
AV
DD3.3
AV
DD1.8
DV
DD3.3
DV
DD1.8
3.135
1.710
3.135
1.710
3.3
1.8
3.3
1.8
52
1
32
1
0.2
1
36
4
296
16
3.465
1.890
3.465
1.890
56
Analog Supply Voltage Range
V
Digital Supply Voltage Range
V
f
DAC
= 250Msps, f
OUT
= 16MHz
Power-down
f
DAC
= 250Msps, f
OUT
= 16MHz
Power-down
f
DAC
= 250Msps, f
OUT
= 16MHz
Power-down
f
DAC
= 250Msps, f
OUT
= 16MHz
Power-down
f
DAC
= 250Msps, f
OUT
= 16MHz
Power-down
mA
μA
mA
μA
mA
μA
mA
μA
mW
μW
I
AVDD3.3
36
Analog Supply
Current
I
AVDD1.8
1
I
DVDD3.3
40
Digital Supply
Current
I
DVDD1.8
324
Power Dissipation
P
DISS
Power-Supply
Rejection Ratio
PSRR
AV
DD3.3
= AV
CLK
= DV
DD3.3
= +3.3V
±
5%
(Notes 8, 9)
-0.1
+0.1
%FS/V
相關(guān)PDF資料
PDF描述
MAX5874 Quadruple Line Driver 20-LCCC -55 to 125
MAX5875 Quadruple Line Driver 14-CDIP -55 to 125
MAX5876 Quadruple Line Driver 14-CFP -55 to 125
MAX5877 Replaced by SN55189A : Quadruple Line Receiver 14-CDIP -55 to 125
MAX5878 16-Bit, 250Msps, High-Dynamic-Performance, Dual DAC with LVDS Inputs
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