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參數(shù)資料
| 型號(hào)： | MAX5753UTN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32CHAN SER 56-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 37 |
| 設(shè)置時(shí)間： | 20µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 32 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 56-TQFN-EP（8x8） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 32 電壓，單極 |
| 采樣率（每秒）： | * |
MAX5753/MAX5754/MAX5755
32-Channel, 14-Bit, Voltage-Output
DACs with Serial Interface
18
______________________________________________________________________________________
DSP Mode (
DSP)
The MAX5753/MAX5754/MAX5755 provide a hardware-
selectable DSP-interface mode. DSP mode, when active,
allows chip select (CS) to go high before the entire 32-bit
command word is clocked in. The active-low DSP logic
input selects microcontroller (C)- or DSP-interface
mode. Drive DSP low for DSP-interface mode. Drive
DSP high for C-interface mode. Figure 2 illustrates seri-
al timing for both C- and DSP-interface modes.
Configuration Register
The configuration register controls the advanced fea-
tures of the MAX5753/MAX5754/MAX5755. Write to the
configuration register by setting control bits C2, C1,
and C0 = 001 and address bits A5–A0 = 100001. Table
8 shows the configuration-register data format for the
D15–D0 data bits. Table 9 shows the commands con-
trolled by the configuration register.
Table 9. Configuration-Register Commands
DATA BIT
NAME
DESCRIPTION
D13
ERRF
Error flag; ERRF goes logic-high when an invalid command is attempted. ERRF is cleared each
time the configuration register is read back to DOUT. Clear-register commands C2, C1, and C0 =
111 resets ERRF. Conditions that trigger ERRF include:
Attempted read of address bits A5–A0 = 111111 (all 32 DACs)
Access to reserved addresses
Access to the configuration register (address bits A5–A0 = 100001 when used with control bits
C2, C1, and C0 = 010 and 011)
Default is logic-low (no error flags); ERRF is read only.
D12
SING
Single device; SING determines the manner in which data is output to DOUT. A logic-high sets the
device to operate in stand-alone mode or in parallel; only the 16 data bits are output to DOUT. A
logic-low sets the device to operate in a daisy chain of devices. In this case, the entire 32-bit
command word is output to DOUT.
Default is logic-low (daisy-chain mode); SING is read/write.
D11
GLT
Glitch-suppression enable; the MAX5753/MAX5754/MAX5755 feature glitch-suppression circuitry
on the analog outputs that minimizes the output glitch during a major carry transition. A logic-low
disables the internal glitch-suppression circuitry, which improves settling time. A logic-high enables
glitch-suppression, suppressing up to 120nV-s glitch impulse on the DAC outputs.
Default is logic-low (glitch suppression disabled); GLT is read/write.
D10
DT
Digital output enable; a logic-low enables DOUT. A logic-high disables DOUT. Disabling DOUT
reduces power consumption and digital noise feedthrough to the DAC outputs from the DOUT
output buffer.
Default is logic-low (DOUT enabled); DT is read/write.
D9
SHDN
Shutdown; a logic-high shuts down all 32 DACs. The logic interface remains active, and the data is
retained in the input and DAC registers. Read/write operations can be performed while the device
is disabled; however, no changes can occur at the device outputs. A logic-low powers up all 32
DACs if the device was previously in shutdown. Upon waking up, the DAC outputs return to the last
stored value in the DAC registers. Default is logic-low (normal operation); SHDN is read/write.
D8 and D7,
S1 and S0
X
Don’t care.
Table 8. Configuration-Register Data Format
16 DATA BITS
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
S1
S0
ERRF
SING
GLT
DT
SHDN
XXXXXXXXXXX
X = Don’t care.
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參數(shù)描述 |
|---|---|
| MAX5753UTN+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 32Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5753UTN+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 32Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5753UTN-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5754ETN | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5754UCB | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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