參數(shù)資料
型號: MAX5593
廠商: Maxim Integrated Products, Inc.
元件分類: DAC
英文描述: Buffered. Fast-Settling. Octal. 12/10/8-Bit. Voltage-Output DACs
中文描述: 帶緩沖、快速建立、八通道、12/10/8位、電壓輸出DAC
文件頁數(shù): 24/33頁
文件大?。?/td> 1114K
代理商: MAX5593
M
Buffered, Fast-Settling, Octal, 12/10/8-Bit,
Voltage-Output DACs
24
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Table 9. Shutdown-Mode Write Command (DACA–DACD)
Table 10. Shutdown-Mode Write Command (DACE–DACH)
Table 11. Shutdown-Control-Bits Write Command
DATA
DIN
CONTROL BITS
0
DATA BITS
P D D 0
1
1
1
0
0
0
0
P D D 1
P D C 1
P D C 0
P D B1
P D B0
P D A1
P D A0
DATA
DIN
CONTROL BITS
0
DATA BITS
P D H 0
1
1
1
0
0
1
0
P D H 1
P D G 1 P D G 0
P D F1
P D F0
P D E 1
P D E 0
DATA
DIN
CONTROL BITS
0
DATA BITS
1
1
1
0
1
0
0
P D C H P D C G P D C F
P D C E P D C D P D C C P D C B P D C A
X = Don’t care.
X = Don’t care.
Table 12. Settling-Time-Mode Write Command
DATA
DIN
CONTROL BITS
1
DATA BITS
S P D E S P D D S P D C S P D B
1
0
1
1
0
0
0
S P D H S P D G
S P D F
S P D A
X = Don’t care.
Shutdown-Mode Bits (PD_0, PD_1)
Use the shutdown-mode bits and control bits to
shut down each DAC independently. The shutdown-
mode bits determine the output state of the selected
channels. The shutdown-control bits put the selected
channels into shutdown-mode. To select the shutdown
mode for DACA–DACH, set PD_0 and PD_1 according
to Table 8 (where “_” is replaced with one of the select-
ed channels (A–H)). The three possible states for unity-
gain versions are 1) normal operation, 2) shutdown with
1k
output impedance, and 3) shutdown with 100k
output impedance. The three possible states for force-
sense versions are 1) normal operation, 2) shutdown
with 1k
output impedance, and 3) shutdown with the
output in a high-impedance state. Tables 9 and 10
show the commands for writing to the shutdown-mode
bits. Table 11 shows the commands for writing the
shutdown-control bits. This command is required to put
the selected channels into shutdown.
Always write the shutdown-mode-bits command first
and then write the shutdown-control-bits command to
properly shut down the selected channels. The shut-
down-control-bits command can be written at any time
after the shutdown-mode-bits command. It does not
have to immediately follow the shutdown-mode-bits
command.
Settling-Time-Mode Bits (SPD_)
The settling-time-mode bits select the settling time (FAST
mode or SLOW mode) of the MAX5590–MAX5595.
Set SPD_ = 1 to select FAST mode or set SPD_ = 0 to
select SLOW mode, where “_” is replaced by A, B, or C
and so on through H, depending on the selected chan-
nel (Table 12). FAST mode provides a 3μs maximum set-
tling time, and SLOW mode provides a 6μs maximum
settling time.
Table 8. Shutdown-Mode Bits
PD_1
PD_0
DESCRIPTIONS
0
0
Shutdown with 1k
termination to ground
on DAC_ output.
0
1
Shutdown with 100k
termination to
ground on DAC_ output for unity-gain
versions. Shutdown with high-impedance
output for force-sense versions.
1
0
Ignored.
1
1
DAC_ is powered up in its normal
operating mode.
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