參數(shù)資料
型號: MAX550AEUA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: +2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in レMAX Package
中文描述: SERIAL INPUT LOADING, 4 us SETTLING TIME, 8-BIT DAC, PDSO8
封裝: UMAX-8
文件頁數(shù): 5/16頁
文件大?。?/td> 172K
代理商: MAX550AEUA
M
+2.5V to +5.5V, Low-Power, S ingle/Dual,
8-Bit Voltage-Output DACs in μMAX Pac kage
_______________________________________________________________________________________
5
OUTPUT GLITCH FILTERING
OUT, 50mV/div, C
L
= 0pF
OUT, 50mV/div, C
L
= 100pF
OUT, 50mV/div, C
L
= 220pF
5
μ
s/div
OUT, 50mV/div, C
L
= 1000pF
M
CS, 5V/div
CODE = 00 hex
_____________________________Typic al Operating Charac teristic s (c ontinued)
(V
DD
= V
REF
= 2.5V, R
L
= 1M
, C
L
= 15pF, T
A
= +25°C, unless otherwise noted.)
SETTLING TIME (RISING)
OUT, 1V/div
2
μ
s/div
M
CS, 5V/div
DAC CODE 00 hex to FF hex
______________________________________________________________Pin Desc ription
Ground
1
1
1
GND
DAC A Output Voltage
2
2
OUTA
Chip-Select Input. A logic low on
CS
enables serial data to be
clocked into the input shift register. Programming commands are
executed at
CS
’s rising edge.
3
3
3
CS
DAC Output Voltage
2
OUT
Serial-Clock Input. Data is clocked in on SCLK’s rising edge.
5
5
5
SCLK
DAC B Output Voltage
6
7
OUTB
Load DAC Input. After
CS
goes high and if programmed by the
control word, a falling edge on
LDAC
updates the DAC latch(es).
Connect
LDAC
to V
DD
if unused.
6
6
LDAC
Serial-Data Input. Data is clocked into the 16-bit input shift register on
SCLK’s rising edge.
4
4
4
DIN
Positive Power Supply (+2.5V to +5.5V)
8
8
8
V
DD
External Reference Voltage Input for DAC(s)
7
7
REF
MAX548A
MAX549A
MAX550A
NAME
FUNCTION
PIN
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