參數(shù)資料
型號(hào)： MAX530BENG
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： DAC
英文描述： Differential Bus Transceiver 8-SOIC -40 to 105
中文描述： PARALLEL, WORD INPUT LOADING, 25 us SETTLING TIME, 12-BIT DAC, PDIP24
封裝： PLASTIC, DIP-24
文件頁(yè)數(shù)： 14/16頁(yè)
文件大?。?/td> 140K
代理商： MAX530BENG
M
+5V, Low-Power, Parallel-Input,
Voltage-Output, 12-Bit DAC
14
______________________________________________________________________________________
INPUT
OUTPUT
1111
1111
1111
1000
0000
0001
1000
0000
0000
0111
1111
1111
0000
0000
0001
0000
0000
0000
(V
REFIN
) 4096
(V
REFIN
) 4096
(V
REFIN
) 4096
(V
REFIN
) 4096
(V
REFIN
)
1
4096
OV
= +V
REFIN
/2
Table 3. Unipolar Binary Code Table
(0V to V
REFIN
Output), Gain = 1
INPUT
OUTPUT
1111
1111
1111
1000
0000
0001
1000
0000
0000
0111
1111
1111
0000
0000
0001
0000
0000
0000
+2 (V
REFIN
) 4096
+2 (V
REFIN
) 4096
+2 (V
REFIN
) 4096
+2 (V
REFIN
) 4096
+2 (V
REFIN
)
1
4096
OV
= +V
REFIN
Table 4. Unipolar Binary Code Table
(0V to 2V
REFIN
Output), Gain = 2
INPUT
OUTPUT
1111
1111
1111
1000
0000
0001
1000
0000
0000
0111
1111
1111
0000
0000
0001
0000
0000
0000
(+V
REFIN
) 2048
(+V
REFIN
)2048
(-V
REFIN
)2048
(-V
REFIN
) 2048
0V
(-V
REFIN
) 2048 = -V
REFIN
Table 5. Bipolar (Offset Binary) Code Table
(-V
REFIN
to +V
REFIN
Output)
Bipolar Configuration
A -V
REFIN
to +V
REFIN
bipolar range is set up by con-
necting ROFS to REFIN and RFB to VOUT, and operat-
ing from dual (±5V) supplies (Figure 11). Table 5
shows the DAC-latch contents (input) vs. VOUT (out-
put). In this range, 1 LSB = REFIN (2
-11
).
Four-Quadrant Multiplic ation
The MAX530 can be used as a four-quadrant multiplier
by connecting ROFS to REFIN and RFB to VOUT and,
using (1) an offset binary digital code, (2) bipolar
power supplies, and (3) a bipolar analog input at
REFIN within the range V
SS
+ 2V to V
DD
- 2V, as shown
in Figure 12.
In general, a 12-bit DAC’s output is (D)(V
REFIN
)(G),
where “G” is the gain (1 or 2) and “D” is the binary rep-
resentation of the digital input divided by 2
12
or 4,096.
This formula is precise for unipolar operation. However,
for bipolar, offset binary operation, the MSB is really a
polarity bit. No resolution is lost, because there is the
same number of steps. The output voltage, however,
has been shifted from a range of, for example, 0V to
4.096V (G = 2) to a range of -2.048V to +2.048V.
Keep in mind that when using the DAC as a four-quad-
rant multiplier, the scale is skewed. The negative full
scale is -V
REFIN
, while the positive full scale is +V
REFIN
- 1LSB.
相關(guān)PDF資料
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