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參數(shù)資料
| 型號： | MAX5270 |
| 廠商： | Maxim Integrated Products, Inc. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 電可擦除可編程邏輯器件 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 251K |
| 代理商： | MAX5270 |
M
Octal, 13-Bit Voltage-Output DAC
with Parallel Interface
8
_______________________________________________________________________________________
Pin Description (continued)
FUNCTION
NAME
PIN
DAC H Buffered Output Voltage
OUTH
32
DAC G Buffered Output Voltage
OUTG
34
Device Sense Ground Input for OUTE and OUTF. In normal operation, OUTE and OUTF are referenced
to DUTGNDEF. When
CLR
is low, OUTE and OUTF are forced to the potential on DUTGNDEF.
DUTGNDEF
36
DAC F Buffered Output Voltage
OUTF
35
Device Sense Ground Input for OUTG and OUTH. In normal operation, OUTG and OUTH are referenced
to DUTGNDGH. When
CLR
is low, OUTG and OUTH are forced to the potential on DUTGNDGH.
DUTGNDGH
33
Positive Reference Input for DACs C, D, E, and F
REFCDEF+
39
DAC D Buffered Output Voltage
OUTD
41
Negative Reference Input for DACs C, D, E, and F. It is externally tied to AGND.
REFCDEF-
40
DAC C Buffered Output Voltage
OUTC
43
DAC B Buffered Output Voltage
OUTB
44
Device Sense Ground Input for OUTC and OUTD. In normal operation, OUTC and OUTD are referenced
to DUTGNDCD. When
CLR
is low, OUTC and OUTD are forced to the potential on DUTGNDCD.
DUTGNDCD
42
DAC E Buffered Output Voltage
OUTE
37
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