The voltage applied to REF should not exceed VDD at any time. I" />
參數(shù)資料
型號(hào): MAX5258EVKIT+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 9/20頁(yè)
文件大小: 0K
描述: KIT EVAL FOR MAX5258
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 8
位數(shù): 8
數(shù)據(jù)接口: 串行
設(shè)置時(shí)間: 10µs
DAC 型: 電壓
工作溫度: -40°C ~ 85°C
已供物品: 板,纜線,CD
已用 IC / 零件: MAX5258
Power Sequencing
The voltage applied to REF should not exceed VDD at
any time. If proper power sequencing is not possible,
connect an external Schottky diode between REF and
VDD to ensure compliance with the absolute maximum
ratings. Do not apply signals to the digital inputs before
the device is fully powered-up.
Power-Supply Bypassing and
Ground Management
Bypass VDD with a 0.1F capacitor, located as close to
VDD and GND as possible. Careful PC board layout
minimizes crosstalk among DAC outputs and digital
inputs. Figure 10 shows suggested circuit board layout
to minimize crosstalk.
Unipolar-Output, Two-Quadrant
Multiplication
In unipolar operation, the output voltages and the refer-
ence input are the same polarity. Figure 11 shows the
MAX5258/MAX5259 unipolar configuration, and Table 2
shows the unipolar code.
MAX5258/MAX5259
+3V/+5V, Low-Power, 8-Bit Octal DAC
with Rail-to-Rail Output Buffers
______________________________________________________________________________________
17
REF
R1
R15
R16
R255
R0
D7
D6
D5
D4
DAC A
MSB
DECODER
D3
D0
D2
D1
LSB DECODER
Figure 8. DAC Simplified Circuit Diagram
OUTC
OUTD
DOUT
DIN
SYSTEM GND
OUTB
OUTA
GND
VDD
REF
LDAC
Figure 10. Suggested PC Board Layout for Minimizing
Crosstalk (Bottom View)
O
DAC CODE
NEGATIVE
OFFSET
OUTPUT
VOLTAGE
Figure 9. Effect of Negative Offset (Single Supply)
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