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參數(shù)資料
| 型號： | MAX5223EKA-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | Low - Power, Dual, 8 - Bit, Voltage Output Serial DAC in 8 - Pin SOT23 |
| 中文描述： | SERIAL INPUT LOADING, 50 us SETTLING TIME, 8-BIT DAC, PDSO8 |
| 封裝： | 3 X 3 MM, SOT-23, 8 PIN |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 225K |
| 代理商： | MAX5223EKA-T |
Applic ations Information
The MAX5223 is specified for single-supply operation
with V
DD
ranging from +2.7V to +5.5V, covering all
commonly used supply voltages in +3V and +5V sys-
tems.
Initialization
An internal POR circuit forces the outputs to zero scale
and initializes all internal registers to zero. Perform an
initial write operation to set the outputs to the desired
voltage at power-up.
Power-S upply and
Ground Management
GND should be connected to the highest quality
ground available. Bypass V
DD
with a 0.1μF to 0.22μF
capacitor to GND. The reference input can be used
without bypassing. For optimum line- and load-transient
response and noise performance, bypass the reference
input with 0.1μF to 4.7μF to GND. Careful PC board lay-
out minimizes crosstalk among DAC outputs, the refer-
ence, and digital inputs. Separate analog lines with
ground traces between them. Make sure that high-fre-
quency digital lines are not routed in parallel to analog
lines.
M
Low-Power, Dual, 8-Bit, Voltage Output
S erial DAC in 8-Pin S OT 23
10
______________________________________________________________________________________
1
2
1
256
256
8
LSB
REF
REF
ANALOG OUTPUT
REF
D
=
×
=
×
=
×
Table 4. Code Table
0V
0
0
0
0
0
0
0
0
+
×
REF
1
256
1
0
0
0
0
0
0
0
+
×
REF
127
256
1
1
1
1
1
1
1
0
+
×
REF
REF
2
128
256
0
0
0
0
0
0
0
1
+
×
REF
129
256
1
0
0
0
0
0
0
1
+
×
REF
255
256
1
1
1
1
1
1
1
1
ANALOG
OUTPUT
D0
D1
D2
D3
D4
D5
D6
D7
DAC CONTENTS
Note:
where D = decimal
value of digital input
Chip Information
TRANSISTOR COUNT: 1480
PROCESS TECHNOLOGY: BiCMOS
CS
SCLK
DIN
t
DS
t
DH
t
CL
t
CH
t
CSS
t
CSPWH
t
CSH
Figure 3. Detailed Serial-Interface Timing Diagram
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