參數(shù)資料
型號(hào): MAX5195EGM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 14-Bit, 260Msps High-Dynamic Performance DAC
中文描述: PARALLEL, WORD INPUT LOADING, 14-BIT DAC, QCC48
封裝: 7 X 7 MM, 0.90 MM HEIGHT, QFN-48
文件頁數(shù): 9/17頁
文件大?。?/td> 599K
代理商: MAX5195EGM
Detailed Description
Architecture
The MAX5195 is a high-performance, 14-bit, segmented
current-source array DAC (Figure 1) capable of operat-
ing with clock speeds up to 260MHz. The converter
consists of separate input and DAC registers, followed
by a current-source array. This current-source array is
capable of generating differential full-scale currents in
the range of 10mA to 20mA. An internal R2R resistor
network, in combination with external 27.4
termination
resistors, convert these differential output currents into a
differential output voltage with a peak-to-peak output
voltage range of 0.5V to 1V. An integrated 1.2V
bandgap reference, control amplifier, and user-selec-
table, external resistor determine the data converter
s
full-scale output range.
Internal Reference and Control Amplifier
The MAX5195 supports operation with the on-chip 1.2V
bandgap reference or an external reference voltage
source. REFIN serves as the input for an external refer-
ence source, and REFOUT provides a 1.2V output volt-
age, if the internal reference is used. For internal
reference operation, REFIN and REFOUT must be con-
nected together and decoupled to AGND with a 1μF
capacitor in parallel with a 0.1μF capacitor for stable
operation.
The MAX5195 reference circuit also employs a control
amplifier, designed to regulate the full-scale current I
FS
for the differential current outputs of the MAX5195. For
stable operation, the output AMPOUT of this amplifier
must be bypassed with a 3k
resistor in parallel with a
1.5μF tantalum capacitor to AGND. Configured as a
voltage-to-current amplifier, the output current can be
calculated as follows:
I
FS
= 64
I
REF
- 1LSB
M
14-Bit, 260Msps High-Dynamic
Performance DAC
_______________________________________________________________________________________
9
AV
CC
OUTP
OUTN
AGND
1.2V
REFERENCE
CURRENT-SOURCE
ARRAY
INPUT LATCH
INPUT REGISTER
CLKP
CLKN
R2R
NETWORK
REFOUT
REFIN
RSET
DV
CC
DGND
D0N/D0P–D13N/D13P
14
DECODER
BIAS
MAX5195
Figure 1. Simplified MAX5195 Block Diagram
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