參數(shù)資料
型號(hào): MAX5183BEEI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: Dual, 10-Bit, 40MHz, Current/Voltage Simultaneous-Output DACs
中文描述: PARALLEL, WORD INPUT LOADING, 0.025 us SETTLING TIME, 10-BIT DAC, PDSO28
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-28
文件頁數(shù): 3/16頁
文件大小: 491K
代理商: MAX5183BEEI
M
Dual, 10-Bit, 40MHz, Current/Voltage
Simultaneous-Output DACs
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= +3V ±10%, AGND = DGND = 0, f
CLK
= 40MHz, I
FS
= 1mA, 400
differential output, C
L
= 5pF, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C.)
CONDITIONS
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
PD = 1, DACEN = X, digital inputs at 0
or DV
DD
(X = don’t care)
PD = 0, DACEN = 0, digital inputs at 0
or DV
DD
PD = 0, DACEN = 1, digital inputs at 0
or DV
DD
PD = 0, DACEN = 1, digital inputs at 0
or DV
DD
μA
0.5
1.0
I
SHDN
Shutdown Current
mA
1.0
1.5
I
STANDBY
Standby Current
mA
4.2
5.0
I
DVDD
Digital Supply Current
V
2.7
3.3
DV
DD
Digital Power-Supply Voltage
mA
2.7
5.0
I
AVDD
Analog Supply Current
V
2.7
3.3
AV
DD
Analog Power-Supply Voltage
mA/mA
8
Current Gain (I
FS
/ I
REF
)
POWER REQUIREMENTS
mV/V
0.5
Reference Supply Rejection
μA
10
I
REFOUT
Reference Output Drive
Capability
ppm/°C
50
TCV
REF
Output Voltage Temperature
Drift
V
1.12
1.2
1.28
V
REF
Output Voltage Range
V
IN
= 0 or DV
DD
ns
0
t
DH2
DAC2 CLK Fall to DATA
Hold Time
ns
0
t
DH1
DAC1 CLK Rise to DATA
Hold Time
ns
10
t
DS2
DAC2 DATA to CLK Fall
Setup Time
ns
10
t
DS1
DAC1 DATA to CLK Rise
Setup Time
pF
10
C
IN
Digital Input Capacitance
TIMING CHARACTERISTICS
μA
±1
I
IN
Digital Input Current
V
0.8
V
IL
Digital Input Voltage Low
V
2
V
IH
Digital Input Voltage High
ns
10
t
CL
Clock Low Time
ns
10
t
CH
Clock High Time
ns
25
t
CP
Clock Period
μs
50
PD Fall Time to V
OUT_
μs
0.5
DACEN Rise Time to V
OUT_
ns
5
CS
Fall to CLK Fall Time
ns
5
CS
Fall to CLK Rise Time
REFERENCE
LOGIC INPUTS AND OUTPUTS
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